74FCT534 ,Octal D Flip-Flop with TRI-STATE Outputsfeatures GTO output control and undershootYTTL/CMOS input and output level compatiblecorrector in a ..
74FCT534 ,Octal D Flip-Flop with TRI-STATE Outputsapplications. A buff- NSC 54/74FCT534 is pin and functionally equivalent toered Clock (CP) and Outp ..
74FR16245QC ,16-Bit Transceiver with 3-STATE Outputsapplications. Current sinking capability is 64 mA A and B output sink capability of 64 mA, sourceon ..
74FR16540 ,16-Bit Buffer/Line Driver with 3-STATE OutputsFeaturesThe 74FR16540 contains sixteen inverting buffers with 3- Inverting buffersSTATE outputs de ..
74FR16540QC ,16-Bit Buffer/Line Driver with 3-STATE OutputsFeaturesThe 74FR16540 contains sixteen inverting buffers with 3- Inverting buffersSTATE outputs de ..
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74LS162 ,Synchronous Decade Counters(synchronous clear)SN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
74LS163 ,Synchronous 4-Bit Binary CountersSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
74LS163A ,Synchronous 4-Bit Binary CountersGeneral Descriptioncounters for n-bit synchronous
74LS164 ,8-Bit Serial-Input/Parallel-Output Shift RegisterLOGIC DIAGRAMA1DQ DQ DQ DQ DQ DQ DQ DQ2BC C C C C C C CD D D D D D D DCP8MR9Q Q Q Q Q Q Q Q0 1 2 3 ..
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74LS165 ,8-Bit Parallel In/Serial Output Shift RegistersFeaturesThis device is an 8-bit serial shift register which shifts data Complementary outputsin th ..
74FCT374A
Octal D Flip-Flop with TRI-STATE Outputs
g9ll,eliiii,f?gii1g,ill
Semiconductor
54FCT/74FCT374A
General Description
The 'FCT374A is a high-speed, Iow-power octal D-type flip-
flop featuring separate D-type inputs for each flip-flop and
TRI-STATE outputs for bus-oriented applications. A buff-
ered Clock (CP) and Output Enable (UE) are common to all
flip-flops.
June 1990
Octal D Flip-Flop with TRI-STATE® Outputs
Features
I: NSC 54/74FCT374A is pin and functionally equivalent
to IDT 54/74FCT374A
n Buffered positive edge triggered clock
" THI-STATE outputs for bus-oriented applications
u TTL input and output level compatible
n TTL inputs accept CMOS levels
I: High current latch up immunity
I: kx = 48 mA (commercial) and 32 mA (military)
n Electrostatic discharge protection it 2 kV
ll Inherently radiation tolerant
Logic Symbols
llllllll
no ih02 Ds trw0s 050, (TE m
- CP CP C1
_0 0E Do 10
oo o, 02 03 04 os Os o, D
I I I I l I I I l
TL/F/10264-1 02
Pin Names C Description
Do-Dr Data Inputs
CP Clock Pulse Input
UE TRl-STATE Output Enable Input
Oo-oz TRI-STATE Outputs
TRI-STATE' is a registered trademark of Nauonal Semitxmductrx Corporation.
FACTTM us a trademark ot Nahonal Semiconductor Corporation.
IEEEIIEC
Connection Diagrams
Pin Assignment
for DIP, Flatpak and SOIC
OE- 1 20 -e
oo- 2 19 -0,
v oo Do- 3 18 -h
o, (h-' 4 17 -05
02 o,- 5 16 -os
os 02- s 15 -os
th Dz- 7 14 -os
os os- 8 13 --04
os os- g 12 -04
o, GND- 10 11 -CP
TL/F/10264-2
TL/F/10264-3
Pin Assignment
forLCC
its h 02 th D1
"-5113
03m lo0
GND- .00
CHE mo?
04- IVcc
C4lEs)CsHE72[Etsl
DS os 06 06 D7
TL/F/10264-4
91990 National Semiconductor Corporation TLlF/10264
l RRD-B20M120/printed in u. s, A.
51nd1n0 HLVLS‘IHJ. lmM d0|:I'd!|:l Cl IEISO VVLSiOdt’L/lOleS
Functional Description
Truth Table
The :FQT374A consists of eight edge-triggered tlip-tlots Inputs Outputs
with individual D-type inputs and TRI-STATE outputs. The
buffered clock and buffered Output Enable are common to Dn CP UE On
f .flieo.pt. The eight flip-flops will store the state pt their H I L H
individual D inputs that meet the setup and hold time re- L f L L
quirements on the LgN-to-HIGH Clock (CP) transition. With X X H Z
the Output Enable (OE) LOW, the contents 2!th eight flip-
flops are available at the outputs. When the OE is HIGH, the H = HIGH Voltage Level
outputs go to the high impedance state. Operation of the 'ir-, ILOW Voltfge Level
--w---". . - = mmateria
OE Input does not affect the state of the flip flops. z = High Impedance
f = LOW-to-HIGH Transition
Logic Diagram
bo D1 De Os D4 D5 06 th
c-trc _l 3 I 1 j
CP D CP o CP D CP D CP D CP D CP D CP D
0 Q Q tl tl 0 o tl Q 0 0 tt 0 O
OE I l , fi I I t
00 o, 02 os 04 05 06 o,
TL/FI10264-5
Please note that this diagram is provided only tor the understanding of logic operations and should not be used to estimate propagation delays.
Absolute Maximum Ratings (Note1)
If MilitarylAerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Terminal Voltage
with Respect to GND (VTERM)
54FCTA - 0.5V to 7.0V
74FCTA - 0.5V to 7.0V
Temperature under Bias (T BIAS)
74FCTA --55''C to + 125°C
54FCTA -65''Cto + 135°C
Storage Temperature (T STG)
74FCTA -55''C to + 125''C
54FCTA -65''C to + 150°C
Power Dissipation (PT) 0.5W
DC Output Current (louT) 120 mA
Note 1: Absolute maximum ratings are those vaiues beyond which damage
to the device may occur. The databook specifications should be met, without
exception. to ensure that the system design is reliable over its power supply.
temperature. and output/input loading variables. National does not recom-
mend operation of FACT FCT circuits outside databook specifications.
Recommended Operating
Conditions
Supply Voltage (Vcc)
54FCTA 4.5V to 5.5V
74FCTA 4.75V to 5.25V
Input Voltage 0V to Vcc
Output Voltage 0V to Vcc
Operating Temperature (TA)
54FCTA - 55''C to + 125°C
74FCTA tPC to + 70°C
Junction Temperature (T J)
CDIP 175°C
PDlP 140''C
DC Characteristics for TCTA Family Devices
Typical values are at Vcc = 5.0V. 25°C ambient and maximum loading. For test conditions shown as Max, use the value
specified for the appropriate device type: Com: Vcc = 5.0V :5%, TA = 0°C to +70°C; Mil: Vcc = 5.0V i10%. TA = -55''C
to +125"C, VHC = Vcc - 0.2V.
Symbol Parameter 54FCTA/74FCTA Units Conditions
Min Typ Max
VIH Minimum High Level 2.0 V
Input Voltage
" Maximum Low Level 0.8 V
Input Voltage
IIH Input High Current 5.0 A Vcc = Max VI = Vcc
5.0 " v. = 2.7V (Note 2)
IIL Input Low Current -5.0 A Vcc = Max VI = 0.5V (Note 2)
- 5.0 '' v. = GND
log Maximum TRI-STATE Current 10.0 Vcc =' Max vo = VCC
10.0 A Vo = 2.7V (Note 2)
-10.0 " vo = 0.5V (Note 2)
--10.0 V0 = GND
" Clamp Diode Voltage -0.7 -1.2 V Voc = Min; IN = -18 mA
los Short CircuitCurrent -60 -120 mA Voc = Max (Note 1); V0 = GND
Vor, Minimum High Level 2.8 3.0 Vcc = 3V; VIN = 0.2V or VHC; IOH = -32 “A
Output1/oltage VHC Vcc v Vcc = Min 10H = -300 WA
2.4 4.3 l/tN = VIH or " lor, = --12 mA (Mil)
2.4 4.3 lors = -15 mA(Com)
VOL Maximum Low Level GND 0.2 Vcc = 3V; VIN = 0.2V or VH0; IOL = 300 p.A
OutputVoltage GND 0.2 v vcc = Min kx = 300 FA
0.3 0.50 " = Ihr, or " IOL = 32 mA (Mil)
0.3 0.50 IOL = 48 mA (Com)
ICC Maximum Quiescent Vcc = Max
Supply Current 0.001 1.5 mA VIN 2 VHC, VIN S 0.2V
[I = 0
A100 Quiescent Supply Current; Vcc = Max
. . mA
TTL Inputs HIGH 0 5 2 0 VIN = 3.4V (Note 3)
DC Characteristics for TCTA Family Devices (Continued)
Typical values are at VCC = 5.0V, 25''C ambient and maximum loading. For test conditions shown as Max, use the value
specified tor the appropriate device type: Com: Vcc = 5.0V t5%, TA = 0°C to +70''C; Mil: Vcc = 5.0V t10%, TA = -55''C
to +125°C, VHC = VCC - 0.2V.
Symbol Parameter MFCTIU74FCTA Units Conditions
Min Typ Max
'CCD Dynamic Power VCC = Max VIN 2 VHC
Supply Current (Note 4) Outputs Open VIN I 0.2V
0.15 0.25 mA/MHz (DE 1 GND
One Input Toggling
50% Duty Cycle
lo Total Power Supply Vcc = Max VIN 2 VHC
Current (Note 6) 1 5 4 0 Outputs Open VIN C 0.2V
. . fcp = 10 MHz
E = GND
fl = 510MHz. " = 3.4V
2.0 6.0 One BitToggling VIN = GND
50% Duty Cycle
(Note 5) VIN 2 VHC
Vcc = Max VIN S 0.2V
&75 7,8 Outputs Open
fCP = 10 MHz
tre = GND
It Is. MHz . VIN = 3.4V
6.0 16.8 Eight Bits Toggling " = GND
50% Duty Cycle
VH Input Hysteresis
on Clock Only 200 mV
Note 1: Maximum tast duration not to exceed one second, not more than one output shorted at one lime.
Note 2: This parameter guaranteed but not tested.
Note 3: Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
Note 4: This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
Mole 5: Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
Ntrte tk lc = IOUIESCENT + 'INPUTS + [DYNAMIC
lc = ICC + Alcc DHNT + loco (fcp/i? + f: th)
ICC = Quiescent Current
Alec = Power Supply Current for a TTL High Input (VlN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of Inputs at DH
lcco = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
lcp = Clock Frequency tor Register Devices (Zero for Non-Register Devices)
h = Input Frequency
N = Number of Inputs at h
All currents are in milliamps and all ltequencies are in megahortz.
AC Electrical Characteristics
54FCTA/74FCTA 74FCTA 54FCTA
= q TA, Vcc = Com TA, Vcc = Mil
Symbol Parameter TVA :3: RL = soon RL = soon Units
cc . th. = 50 pF th. = so pF
Typ Min (Note 1) Max Min (Note I) Max
tpLH Propagation Delay
tPHL Cr, to On 4.5 2.0 6.5 ns
tPZH Output Enable Time 5.5 1.5 6.5 ns
tsz Output Disable Time 4.0 1.5 5.5 ns
tsu Set Up Time High or Low 1.0 2.0 ns
On to Cp
tH Hold Time High or Low
on to GP 0.5 1.5 ns
tw Cp Pulse Width
High or Low 4.0 5.0 ns
Note 1: Minimum limits ale guaranteed but not tested on propagation delays.
Capacitance TA = +25°C,f = 1.0 MHz
Symbol Parameter (Note) Typ Max Unit Condition
CIN InputCapacitance 6 10 pF VIN = 0V
COUT Output Capacitance 8 12 pF VOUT -= 0V
Note: This parameter is measured at characterization but not Iested.
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74FCT 17y_A
Temperature Range Family
74FCT = Commercial TTL-Compatible
54FCT = Military TTL-Compatible
Device Type
Package Code
P = Plastic DIP
D = Ceramic DIP
= Flatpak
L = Leadless Ceramic Chip Carrier (LCC)
S = Small Outline (SOIC)
T, Special Variations
X = Devices shipped in 13"
QR = Commercial grade device
with burn-in
QB = Military grade device with
environmental and burn-in
processing shipped in tubes
Temperature Range
C = Commercial (0°C to +70''C)
M = Military(-55''G to +125°C)
Physical Dimensions inches (millimeters)
(5.030 t 0.127)
0.015 20,010
4r'x ------
_ A 7M! /" :030130254)
tl.350t0m8 0.015 F. 's, //
(0090:0203. - l---/rr,6.3,-crht,',-7,,l; (m, J -.\\ 0 _ i-le-Ili-l-Ill,-,',-,.
(1.ti00-19r5) mm m' 0 x ', //" 0180:5279,
"22-ttm)
—— "0di59-ihrtt)
I1r07r-i),lm J m
(IN5ll-b382)
.4 "45-0.055
tf, (1.t43-1.397)
05mm "P *°*337“°‘°33 ( L? f IhMs-thim5
il. 20:108. '"-i1O43-1.397)
Top View Side View TYP
d “ox 004010.010
(1015:0254;
Bonom Vlew
tln03 02:,
iiGm 070 .
mm '/tiuaitrt MAX "P
(0.559 Jc.002
MAX TV? 10-152)
DemilA
EMAMEVD“
20-Terminal Ceramic Leadless Chip Carrier (L)
NS Package Number EZOA
0.025 4 (25.010) "-,
(0.635) MAX
RM FlFillrilrrrll1TilbTlFilF3lFilliil
(h22l_r-tht'1i1 -
15.58lb-7.8N)
El Ill [tl [LI Ill Lil IL] Li] ttln,
(0.127-tMIB)
W "P 003120.005
(th940t0.127)
0.005 005510005
9_- tttll - 0290-0320 "i (0.127) (1. 30110127F’l - Il.iIN-0.0©
51:"; "i"'")? ELASS 8EALAtlT mu I-is-ar-Fra
l 's, k
. = m‘
l Ici,'.---,--"'''''"''-'), nu V
95°+5° 8tP JV {Am i
1 0000 0012 (1010. 11s.1.?firtitn
"""'_'"''= um (3.175- 45.080)
(02004305) I
0.310-0.Mtl 0000 ' 001010.000
(7.8N-NAI) [1.524) (0051:0075)
801mm Iitn*0-tllt)
(154020.254)
20-Lead Ceramic Dual-ln-Line Package (D)
NS Package Number J20A
J20A [REV Mt
Physical Dimensions inches (millimeters) (Continued)
tri-ijt
C-ri-trits-r-sus-r-
I 3M-t 419
(10.00I-1Mm
LEAD " t
30' WP
ttErtf i' iirrrirr,rr,ri,Lcci1
2 a a s T u a "_
IMHII “IX
10.25!)
(hat-C."'
H - (mm 4.505)
0010-0023 "93-iht00
(tttM-tl 7311 "v-- r '"'"i'"
I . "tu-0Mt
113%? ti7ttr-tr-aas,
L__l ;_ L t - sumac
00030013 m/ e l Bu“ 1 005' ! t
P-Te.-'-"''-':.', _ - _ - - 0.0u-EON
Imwm "dull,, - J'llliir-'ll'i1 ""5" _ eu ml , a i'ti's'i--Ti'ii-'/"
TO ILL lEIDS IVPALLLENJ’S "P L um
(":mlnp um 11m "
20-Lead Small Outline Integrated Circuit is)
NS Package Number M208
I "70-0S90
0.032 Y, 0.030 ' (24.838-25.148)
2.337 x 0.102 E 0032:0005
it3,'ax""lir"sN,irzmranrtmrmiinsrsornm1rm-m1 1 m mm
PIN no. 1105011 _ . 01‘0'9-250
"s, (5,095-5,304) PIN NIH IDENT'
c-li... 0111mm "i':,,
11.1121 !.fuJl2lltJUslli-iJLrJL1J1gJ0Al ll
_itHa3.L5 0.325 __ 12%) 011110112
i-hai-is-iii-s) “511 0.050 NOM tl.Mil 00110112 A l 01:10 0005
- k - - . - t . .
l 0.065 (1.52” (1.016) a (4X) -ia%ttri)
' FjiTil till TYP TVP l . .
l ____l I l I I I) 01051-0100
1 (Li83-5,tBOl
$7, 5° tTIP 1?iC8rltllL' 0.015 9030.001' 1
Tir 03011203 g ------ 0.020
0.100:_0.010‘| 'L- GL- 0.150 (0.5001
MNOM M"; (tS4tltt12M) ”01"0023 - (3.175-3.8lil) MIN
0.350 11015) (triririCar)
#111001
10.890)
WIFEVAI
20-Lead Plastic DuaI-In-Line Package (P)
NS Package Number N205
54FCT/74FCT374A Octal D Flip-Flop with TRl-STATE Outputs
Physical Dimensions inches(mil1imeters) (Continued)
D.060-0.090 0.540 MAX
(1.524-2.28ti) (13.72)
- 0.030-0.040 0.050l0.005 0.005
(ir.-7tiieiii-iiy" (1.27%3127) - +(0.127) MIN M
/i1fi'i'-) 3 0260-0270
l 2 3 4 5 6 7 a 910 0.008-0.012 LI
f J.t (0203-0305)
SEE A ' DETAIL A
DETAIL A ll 0.250-0.520
PIN fl (6.50-8.1285
TENT J
_,I van (REV o)
0.00t-0.006 0,015-0,019 0.045
(0.102-0.152 "P - 0.381-0.483 TTP - i'.'r7iV" m
LIFE SUPPORT POLICY
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
Lit. ' 114703
NATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
l, Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and whose
failure to perform, when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Nailonal SetttiCottthtcttrr
Corpormlon
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Datasheets for electronic components.
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This file is the datasheet for the following electronic components:
74FCT374A - product/74fct374a?HQS=T|-nulI-null-dscataIog-df-pf-null-wwe
