74F794PC ,8-Bit Register with Read BackFeaturesThe 74F794 is an 8-bit register with readback capability
74F794PC
8-Bit Register with Read Back
74F794 8-Bit Register with Readback March 1990 Revised February 2004 74F794 8-Bit Register with Readback General Description Features The 74F794 is an 8-bit register with readback capability3-STATE outputs on the I/O port designed to store data as well as read the register informa-D and Q output sink capability of 64 mA tion back onto the data bus. The I/O bus (D bus) has Functionally and pin equivalent to the 74LS794 3-STATE outputs. Current sinking capability is 64 mA on both the D and Q busses. Data is loaded into the registers on the LOW-to-HIGH tran- sition of the clock (CP). The output enable (OE) is used to enable data on D –D . When OE is LOW, the output of the 0 7 registers is enabled on D –D , enabling D as an output 0 7 bus. When OE is HIGH, D –D are inputs to the registers 0 7 configuring D as an input bus. Ordering Code: Order Number Package Number Package Description 74F794PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Logic Symbol Connection Diagram © 2004 DS010652
