74F651SPC ,Transceivers/RegistersFeaturesThese devices consist of bus transceiver circuits with D- Independent registers for A and ..
74F652 ,Transceivers/RegistersFeaturesThese devices consist of bus transceiver circuits with
74F651SPC
Transceivers/Registers
74F651 • 74F652 Transceivers/Registers March 1988 Revised August 1999 74F651 • 74F652 Transceivers/Registers General Description Features These devices consist of bus transceiver circuits with D- � Independent registers for A and B buses type flip-flops, and control circuitry arranged for multiplexed � Multiplexed real-time and stored data transmission of data directly from the input bus or from � Choice of non-inverting and inverting data paths internal registers. Data on the A or B bus will be clocked 74F651 inverting into the registers as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are pro- 74F652 non-inverting vided to control the transceiver function. Ordering Code: Order Number Package Number Package Description 74F651SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F651SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide 74F652SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F652SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram © 1999 DS009581
