74F299 ,8-bit universal shift/storage register (3-State)FeaturesYCommon parallel I/O for reduced pin countThe ’F299 is an 8-bit universal shift/storage reg ..
74F299PC ,Octal Universal Shift/Storage Register with Common Parallel I/O PinsFunctional Description Logic DiagramThe 74F299 contains eight edge-triggered D-type flip-flopsand t ..
74F299SJ ,Octal Universal Shift/Storage Register with Common Parallel I/O PinsFeaturesThe 74F299 is an 8-bit universal shift/storage register with Common parallel I/O for reduc ..
74F299SJX , Octal Universal Shift/Storage Register with Common Parallel I/O PinsapplicationsQ , are provided to allow easy serial cascading. A separate7 Guaranteed 4000V minimum E ..
74F299SJX , Octal Universal Shift/Storage Register with Common Parallel I/O PinsFunctional Description Logic DiagramThe 74F299 contains eight edge-triggered D-type flip-flopsand t ..
74F30 ,8-Input NAND GateGeneral DescriptionThis device contains a single gate, which performs thelogic NAND function. Order ..
74HCU04D ,Hex inverterPin configuration DIP14, SO14 and (T)SSOP14 Fig 5.
74HCU04DB ,Hex inverterPin configuration DHVQFN1474HCU04 All information provided in this document is subject to legal dis ..
74HCU04N ,Hex inverterLogic diagram (one inverter)5. Pinning information 74HCU04terminal 1index area74HCU041Y 2 13 6A1 14 ..
74HCU04PW ,74HCU04; Hex inverterGENERAL DESCRIPTIONThe 74HCU04 is a high-speed Si-gate CMOS device and is pin compatible with low p ..
74HCU04PW ,74HCU04; Hex inverterFEATURES• Output capability: standard• I category: SSICC
74HCU04PW ,74HCU04; Hex inverterGeneral descriptionThe 74HCU04 is a hex unbuffered inverter. Inputs include clamp diodes. This enab ..
74F299
Octal Universal Shift/Storage Register with Common Parallel I/O Pins
TL/F/9515
54F/74F299
Octal
Universal
Shift/Storage
Register
with
Common
Parallel
I/O
Pins
May 1995
54F/74F299 Octal Universal Shift/Storage Register
with Common Parallel I/O Pins
General Description
The ’F299isan 8-bit universal shift/storage register with
TRI-STATEÉ outputs. Four modesof operationare possi-
ble: hold (store), shiftleft, shift rightand load data.Thepar-
allel load inputsand flip-flop outputsare multiplexedtore-
ducethe total numberof package pins. Additional outputs,
Q0–Q7,are providedto allow easy serial cascading.A sep-
arate active LOW Master Resetis usedto resetthe register.
Features Common parallelI/Ofor reducedpin count Additional serial inputs and outputsfor expansion Four operating modes: shift left, shift right, load and
store TRI-STATE outputsfor bus-oriented applications Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F299PC N20A 20-Lead (0.300× Wide) Molded Dual-In-Line
54F299DM (Note2) J20A 20-Lead CeramicDual-In-Line
74F299SC (Note1) M20B 20-Lead (0.300× Wide) Molded Small Outline, JEDEC
74F299SJ (Note1) M20D 20-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F299FM(Note2) W20A 20-Lead Cerpack
54F299LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note 1:Devicesalso availablein13×reel. UsesuffixeSCXandSJX.
Note 2:Militarygrade devicewith environmentaland burn-in processing.Use suffixe DMQB, FMQBandLMQB.
Logic Symbols
TL/F/9515–1
IEEE/IEC
TL/F/9515–4
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
