74F280SCX ,9-Bit Parity Generator/CheckerElectrical CharacteristicsVSymbol Parameter Min Typ Max Units ConditionsCCV Input HIGH Voltage 2.0 ..
74F280SCX ,9-Bit Parity Generator/Checker74F280 9-Bit Parity Generator/CheckerApril 1988Revised September 200074F2809-Bit Parity Generator/C ..
74F280SCX ,9-Bit Parity Generator/Checker74F280 9-Bit Parity Generator/CheckerApril 1988Revised September 200074F2809-Bit Parity Generator/C ..
74F280SJ ,9-Bit Parity Generator/CheckerGeneral DescriptionThe F280 is a high-speed parity generator/checker thataccepts nine bits of input ..
74F280SJX ,9-Bit Parity Generator/Checker74F280 9-Bit Parity Generator/CheckerApril 1988Revised September 200074F2809-Bit Parity Generator/C ..
74F280SJX ,9-Bit Parity Generator/CheckerElectrical CharacteristicsVSymbol Parameter Min Typ Max Units ConditionsCCV Input HIGH Voltage 2.0 ..
74HCU04 ,Hex Unbuffered InverterMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agai ..
74HCU04D ,Hex inverterPin configuration DIP14, SO14 and (T)SSOP14 Fig 5.
74HCU04DB ,Hex inverterPin configuration DHVQFN1474HCU04 All information provided in this document is subject to legal dis ..
74HCU04N ,Hex inverterLogic diagram (one inverter)5. Pinning information 74HCU04terminal 1index area74HCU041Y 2 13 6A1 14 ..
74HCU04PW ,74HCU04; Hex inverterGENERAL DESCRIPTIONThe 74HCU04 is a high-speed Si-gate CMOS device and is pin compatible with low p ..
74HCU04PW ,74HCU04; Hex inverterFEATURES• Output capability: standard• I category: SSICC
74F280PC-74F280SCX-74F280SJ-74F280SJX
9-Bit Parity Generator/Checker
74F280 9-Bit Parity Generator/Checker April 1988 Revised September 2000 74F280 9-Bit Parity Generator/Checker General Description The F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even out- put. Ordering Code: Order Number Package Number Package Description 74F280SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F280SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F280PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 DS009512
