74F27SJ ,Triple 3-Input NOR GateGeneral DescriptionThis device contains three independent gates, each ofwhich performs the logic NO ..
74F280 ,9-Bit Parity Generator/CheckerPIN CONFIGURATION• High-impedance NPN base inputs for reduced loading (20μA in Low and High states) ..
74F280PC ,9-Bit Parity Generator/CheckerGeneral DescriptionThe F280 is a high-speed parity generator/checker thataccepts nine bits of input ..
74F280SCX ,9-Bit Parity Generator/CheckerElectrical CharacteristicsVSymbol Parameter Min Typ Max Units ConditionsCCV Input HIGH Voltage 2.0 ..
74F280SCX ,9-Bit Parity Generator/Checker74F280 9-Bit Parity Generator/CheckerApril 1988Revised September 200074F2809-Bit Parity Generator/C ..
74F280SCX ,9-Bit Parity Generator/Checker74F280 9-Bit Parity Generator/CheckerApril 1988Revised September 200074F2809-Bit Parity Generator/C ..
74HCT86N ,Quad 2-input EXCLUSIVE-OR gatePin configuration DIP14, SO14 and (T)SSOP145.2 Pin description Table 2. Pin descriptionSymbol Pin D ..
74HCT86PW ,Quad 2-input EXCLUSIVE-OR gateGENERAL DESCRIPTION• Output capability: standard The 74HC/HCT86 are high-speed Si-gate CMOS devices ..
74HCT86PW ,Quad 2-input EXCLUSIVE-OR gateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT86PW ,Quad 2-input EXCLUSIVE-OR gateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT86PW ,Quad 2-input EXCLUSIVE-OR gateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT9046AD ,PLL with bandgap controlled VCOINTEGRATED CIRCUITSDATA SHEET74HCT9046APLL with bandgap controlled VCO1999 Jan 11Product specificati ..
74F27PC-74F27SJ
Triple 3-Input NOR Gate
74F27 Triple 3-Input NOR Gate April 1988 Revised August 1999 74F27 Triple 3-Input NOR Gate General Description This device contains three independent gates, each of which performs the logic NOR function. Ordering Code: Order Number Package Number Package Description 74F27SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F27SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F27PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Function Table Unit Loading/Fan Out Inputs Output Pin Names Description U.L. Input I /I IH IL A B C O n n n n HIGH/LOW Output I /I OH OL LLL H A , B , C Data Inputs 1.0/1.0 20 μA/−0.6 mA n n n XX H L O Data Outputs 50/33.3 −1 mA/20 mA n XH X L HX X L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 1999 DS009539
