74F194SJX , 4-Bit Bidirectional Universal Shift RegisterFunctional Description Mode Select TableThe 74F194 contains four edge-triggered D-type flip-flopsOp ..
74F20PC ,Dual 4-Input NAND GateGeneral DescriptionThis device contains two independent gates, each of whichperforms the logic NAND ..
74F20SC ,Dual 4-Input NAND GateElectrical CharacteristicsSymbol Parameter Min Typ Max Units V ConditionsCCV Input HIGH Voltage 2.0 ..
74F20SCX ,Dual 4-Input NAND GateGeneral DescriptionThis device contains two independent gates, each of whichperforms the logic NAND ..
74F20SCX ,Dual 4-Input NAND GateGeneral DescriptionThis device contains two independent gates, each of whichperforms the logic NAND ..
74F20SJ ,Dual 4-Input NAND GateGeneral DescriptionThis device contains two independent gates, each of whichperforms the logic NAND ..
74HCT4017N ,74HC/HCT4017; Johnson decade counter with 10 decoded outputsINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT4020D ,14-stage binary ripple counterINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT4020DB ,74HC/HCT4020; 14-stage binary ripple counterGENERAL DESCRIPTIONCP.The 74HC/HCT4020 are high-speed Si-gate CMOSA HIGH on MR clears all counter s ..
74HCT4020N ,74HC/HCT4020; 14-stage binary ripple counterGENERAL DESCRIPTIONCP.The 74HC/HCT4020 are high-speed Si-gate CMOSA HIGH on MR clears all counter s ..
74HCT4020N ,74HC/HCT4020; 14-stage binary ripple counterINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT4024N ,7-stage binary ripple counter
74F194SJX
4-Bit Bidirectional Universal Shift Register
74F194 4-Bit Bidirectional Universal Shift Register April 1988 Revised March 2000 74F194 4-Bit Bidirectional Universal Shift Register General Description Features The 74F194 is a high-speed 4-bit bidirectional universal � Typical shift frequency of 150 MHz shift register. As a high-speed, multifunctional, sequential � Asynchronous master reset building block, it is useful in a wide variety of applications. It � Hold (do nothing) mode may be used in serial-serial, shift left, shift right, serial-par- � Fully synchronous serial or parallel data transfers allel, parallel-serial, and parallel-parallel data register transfers. Ordering Code: Order Number Package Number Package Description 74F194SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F194SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F194PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC © 2000 DS009498
