74F174SJ ,Hex D-Type Flip-Flop with Master ResetFeaturesYEdge-triggered D-type inputsThe ’F174 is a high-speed hex D flip-flop. The device isYused ..
74F174SJX ,Hex D-Type Flip-Flop with Master ResetFunctional Description Truth TableThe 74F174 consists of six edge-triggered D-type flip-flopsInputs ..
74F175 ,Quad D Flip-Flop54F/74F175QuadDFlip-FlopNovember199454F/74F175QuadDFlip-FlopGeneralDescription
74F175A ,Quad D flip-flop
74F175AD ,Quad D flip-flop
74F175AN ,Quad D flip-flop
74HCT373D ,Octal D-type transparent latch; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT373DB ,Octal D-type transparent latch; 3-stateapplications3-state true outputs. When LE is HIGH, data at the Dn• Common 3-state output enable inp ..
74HCT373N ,74HC/HCT373; Octal D-type transparent latch; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT373PW ,Octal D-type transparent latch; 3-stateFEATURES input and an output enable (OE) input are common to alllatches.• 3-state non-inverting out ..
74HCT374D ,Octal D-type flip-flop; positive edge-trigger; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT374DB ,Octal D-type flip-flop; positive edge-trigger; 3-stateGENERAL DESCRIPTIONThe “374” is functionally identical to the “534”, but hasThe 74HC/HCT374 are hig ..
74F174SJ
Hex D Flip-Flop with Master Reset
TL/F/9489
54F/74F174
Hex
Flip-Flop
with
Master
Reset
November 1994
54F/74F174 HexD Flip-Flop with Master Reset
General Description
The ’F174isa high-speedhexD flip-flop. The deviceis
used primarilyasa 6-bit edge-triggered storage register.
The informationontheD inputsis transferredto storage
duringthe LOW-to-HIGH clock transition.The devicehasa
Master Resetto simultaneously clearall flip-flops.
Features Edge-triggered D-type inputs Buffered positive edge-triggered clock Asynchronous common reset Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F174PC N16E 16-Lead (0.300× Wide) Molded Dual-In-Line
54F174DM (Note2) J16A 16-Lead CeramicDual-In-Line
74F174SC (Note1) M16A 16-Lead (0.150× Wide) Molded Small Outline, JEDEC
74F174SJ (Note1) M16D 16-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F174FM(Note2) W16A 16-Lead Cerpack
54F174LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note 1:Devicesalso availablein13×reel. UseSuffixeSCXandSJX.
Note 2:Militarygrade devicewith environmentaland burn-in processing.Use suffixe DMQB, FMQBandLMQB.
Logic Symbols Connection Diagrams
TL/F/9489–3
IEEE/IEC
TL/F/9489–5
Pin Assignmentfor
DIP,SOICand Flatpak
TL/F/9489–1
Pin Assignment
for LCC
TL/F/9489–2
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.