74F174 ,Hex D flip-flopsFeaturesYEdge-triggered D-type inputsThe ’F174 is a high-speed hex D flip-flop. The device isYused ..
74F174PC ,Hex D-Type Flip-Flop with Master ResetFunctional Description Truth TableThe 74F174 consists of six edge-triggered D-type flip-flopsInputs ..
74F174SCX ,Hex D-Type Flip-Flop with Master ResetFunctional Description Truth TableThe 74F174 consists of six edge-triggered D-type flip-flopsInputs ..
74F174SJ ,Hex D-Type Flip-Flop with Master ResetFeaturesYEdge-triggered D-type inputsThe ’F174 is a high-speed hex D flip-flop. The device isYused ..
74F174SJX ,Hex D-Type Flip-Flop with Master ResetFunctional Description Truth TableThe 74F174 consists of six edge-triggered D-type flip-flopsInputs ..
74F175 ,Quad D Flip-Flop54F/74F175QuadDFlip-FlopNovember199454F/74F175QuadDFlip-FlopGeneralDescription
74HCT365D ,74HC/HCT365; Hex buffer/line driver; 3-stateGENERAL DESCRIPTIONoutputs.The 74HC/HCT365 are high-speed Si-gate CMOS devicesand are pin compatibl ..
74HCT365N ,74HC/HCT365; Hex buffer/line driver; 3-stateFEATURES The 74HC/HCT365 are hex non-inverting buffer/linedrivers with 3-state outputs. The 3-state ..
74HCT366D ,74HC/HCT366; Hex buffer/line driver; 3-state; inverting
74HCT366D ,74HC/HCT366; Hex buffer/line driver; 3-state; invertingFeatures and benefits Inverting outputs Input levels: For 74HC366: CMOS level For 74HC366: TTL ..
74HCT366N ,74HC/HCT366; Hex buffer/line driver; 3-state; inverting
74HCT367D ,Hex buffer/line driver; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74F174
Hex D Flip-Flop with Master Reset
TL/F/9489
54F/74F174
Hex
Flip-Flop
with
Master
Reset
November 1994
54F/74F174 HexD Flip-Flop with Master Reset
General Description
The ’F174isa high-speedhexD flip-flop. The deviceis
used primarilyasa 6-bit edge-triggered storage register.
The informationontheD inputsis transferredto storage
duringthe LOW-to-HIGH clock transition.The devicehasa
Master Resetto simultaneously clearall flip-flops.
Features Edge-triggered D-type inputs Buffered positive edge-triggered clock Asynchronous common reset Guaranteed 4000V minimum ESD protection
Commercial Military Package Package DescriptionNumber
74F174PC N16E 16-Lead (0.300× Wide) Molded Dual-In-Line
54F174DM (Note2) J16A 16-Lead CeramicDual-In-Line
74F174SC (Note1) M16A 16-Lead (0.150× Wide) Molded Small Outline, JEDEC
74F174SJ (Note1) M16D 16-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F174FM(Note2) W16A 16-Lead Cerpack
54F174LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note 1:Devicesalso availablein13×reel. UseSuffixeSCXandSJX.
Note 2:Militarygrade devicewith environmentaland burn-in processing.Use suffixe DMQB, FMQBandLMQB.
Logic Symbols Connection Diagrams
TL/F/9489–3
IEEE/IEC
TL/F/9489–5
Pin Assignmentfor
DIP,SOICand Flatpak
TL/F/9489–1
Pin Assignment
for LCC
TL/F/9489–2
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
