SN74CBTLV3126DBQR ,Low-Voltage Quadruple FET Bus Switchmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74CBTLV3126DGVR ,Low-Voltage Quadruple FET Bus Switchfeatures independent line switches. Each switch is disabledwhen the associated output-enable (OE) i ..
SN74CBTLV3126PW ,Low-Voltage Quadruple FET Bus Switch/sc/package.FUNCTION TABLE(each bus switch)INPUTFUNCTIONOEL DisconnectH A port = B portPlease be aw ..
SN74CBTLV3126PWR ,Low-Voltage Quadruple FET Bus Switchmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74CBTLV3245A ,Low-Voltage Octal FET Bus SwitchSCDS034M–JULY 1997–REVISED AUGUST 2005(1)Absolute
SN74CBTLV3245ADBQ , LOW-VOLTAGE OCTAL FET BUS SWITCH
SN74S74N ,Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clearq Package Options Include Plastic "Small SN5474 . . .J PACKAGEOutline" Packages. Ceramic Chip Carri ..
SN74S74N. ,Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clearq Package Options Include Plastic "Small SN5474 . . .J PACKAGEOutline" Packages. Ceramic Chip Carri ..
SN74S74NSR ,Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clearq Package Options Include Plastic "Small SN5474 . . .J PACKAGEOutline" Packages. Ceramic Chip Carri ..
SN74S74NSR ,Dual D-Type Positive-Edge-Triggered Flip-Flops With Preset And Clearq Package Options Include Plastic "Small SN5474 . . .J PACKAGEOutline" Packages. Ceramic Chip Carri ..
SN74SSQE32882ZALR ,JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA 0 to 85FEATURESoperation associated with the Quad Chip Select2• JEDEC SSTE32882 CompliantEnable (QCSEN) in ..
SN74SSQE32882ZCJR , JEDEC SSTE32882 Compliant 28-Bit to 56-Bit Registered Buffer with Address-Parity Testmaximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functio ..
74CBTLV3126DBQRE4-SN74CBTLV3126D-SN74CBTLV3126DBQR-SN74CBTLV3126DGVR-SN74CBTLV3126PW-SN74CBTLV3126PWR
Low-Voltage Quadruple FET Bus Switch 16-SSOP -40 to 85
1OE
2OE
GNDCC
4OE
3OE
D, DGV, OR PW PACKAGE
(TOP VIEW)1OE
2OE
GND
VCC
4OE
3OE
DBQ PACKAGE
(TOP VIEW)NC − No internal connection
RGY PACKAGE
(TOP VIEW)4OE
3OE
2OE
1OE
GND
description/ordering informationThe SN74CBTLV3126 quadruple FET bus switch features independent line switches. Each switch is disabled
when the associated output-enable (OE) input is low.
This device is fully specified for partial-power-down applications using Ioff . The Ioff feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each bus switch)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
