74AUP1T34GF Fast Delivery |IC PHOENIX CO.,LIMITED

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74AUP1T34GF
Low-power dual supply translating buffer
1. General description
The 74AUP1T34 provides a single buffer with two separate supply voltages. Input A is
designed to track VCC(A). Output Y is designed to track VCC(Y). Both, VCC(A) and VCC(Y)
accepts any supply voltage from 1.1 V to 3.6 V. This feature allows universal low voltage
interfacing between any of the 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V voltage nodes.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 1.1 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire VCC range from 1.1 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits Wide supply voltage range from 1.1 Vto 3.6V High noise immunity Complies with JEDEC standards: JESD8-7 (1.2 Vto 1.95V) JESD8-5 (1.8 Vto 2.7V) JESD8-B (2.7 Vto 3.6V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000V MM JESD22-A115-A exceeds 200V CDM JESD22-C101E exceeds 1000V Wide supply voltage range: VCC(A): 1.1Vto 3.6V VCC(Y): 1.1Vto 3.6V Low static power consumption; ICC = 0.9 A (maximum) Each port operates over the full 1.1 V to 3.6 V power supply range Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6V Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from 40 Cto+85 C and 40 Cto+125C
74AUP1T34
Low-power dual supply translating buffer
Rev. 5 — 4 September 2013 Product data sheet
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
3. Ordering information
4. Marking
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
Table 1. Ordering information
74AUP1T34GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AUP1T34GM 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 1 1.45 0.5 mm
SOT886
74AUP1T34GF 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads;
6 terminals; body 11 0.5 mm
SOT891
74AUP1T34GN 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 0.9 1.0 0.35 mm
SOT1115
74AUP1T34GS 40 C to +125C XSON6 extremely thin small outline package; no leads; terminals; body 1.0 1.0 0.35 mm
SOT1202
74AUP1T34GX 40 C to +125C X2SON5 X2SON5: plastic thermal enhanced extremely thin
small outline package; no leads; 5 terminals;
body 0.8 0.8 0.35 mm
SOT1226
Table 2. Marking
74AUP1T34GW pQ
74AUP1T34GM pQ
74AUP1T34GF pQ
74AUP1T34GN pQ
74AUP1T34GS pQ
74AUP1T34GX pQ
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
6. Pinning information
6.1 Pinning
6.2 Pin description
Table 3. Pin description
VCC(A) 1 1 supply voltage port A 2 2 data input A
GND 3 3 ground (0V) 4 4 data output Y
n.c. - 5 not connected
VCC(Y) 5 6 supply voltage port Y
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
7. Functional description
[1] H= HIGH voltage level; L= LOW voltage level.
8. Limiting values
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP5 packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 and X2SON5 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
Table 4. Function table[1]
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC(A) supply voltage A 0.5 +4.6 V
VCC(Y) supply voltage Y 0.5 +4.6 V
IIK input clamping current VI <0V 50 - mA input voltage [1] 0.5 +4.6 V
IOK output clamping current VO <0V 50 - mA output voltage Active mode and Power-down mode [1] 0.5 +4.6 V output current VO =0 VtoVCC(Y) - 20 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb= 40 C to +125C [2]- 250 mW
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
9. Recommended operating conditions
10. Static characteristics
Table 6. Recommended operating conditions
VCC(A) supply voltage A 1.1 3.6 V
VCC(Y) supply voltage Y 1.1 3.6 V input voltage 0 3.6 V output voltage 0 VCC(Y) V
Tamb ambient temperature 40 +125 C
t/V input transition rise and fall rate control and data inputs;
VCC(A) = 1.1 V to 3.6 V
0200 ns/V
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground=0V).
Tamb = 25 C
VIH HIGH-level
input voltage
VCC(A) = 1.1 V to 1.95 V; VCC(Y) = 1.1 V to 3.6 V 0.65  VCC(A) -- V
VCC(A) = 2.3 V to 2.7 V; VCC(Y) = 1.1 V to 3.6 V 1.6 - - V
VCC(A) = 3.0 V to 3.6 V; VCC(Y) = 1.1 V to 3.6 V 2.0 - - V
VIL LOW-level input
voltage
VCC(A) = 1.1 V to 1.95 V; VCC(Y) = 1.1 V to 3.6 V - - 0.35  VCC(A)V
VCC(A) = 2.3 V to 2.7 V; VCC(Y) = 1.1 V to 3.6 V - - 0.7 V
VCC(A) = 3.0 V to 3.6 V; VCC(Y) = 1.1 V to 3.6 V - - 0.9 V
VOH HIGH-level
output voltage
VI = VIH
IO = 20 A; VCC(A) =VCC(Y)= 1.1V to 3.6 V VCC(Y)  0.1 - - V
IO = 1.1 mA; VCC(A) = VCC(Y) = 1.1 V 0.75  VCC(Y) -- V
IO = 1.7 mA; VCC(A) = VCC(Y) = 1.4 V 1.11 - - V
IO = 1.9 mA; VCC(A) = VCC(Y) = 1.65 V 1.32 - - V
IO = 2.3 mA; VCC(A) = VCC(Y) = 2.3 V 2.05 - - V
IO = 3.1 mA; VCC(A) = VCC(Y) = 2.3 V 1.9 - - V
IO = 2.7 mA; VCC(A) = VCC(Y) = 3.0 V 2.72 - - V
IO = 4.0 mA; VCC(A) = VCC(Y) = 3.0 V 2.6 - - V
VOL LOW-level
output voltage
VI = VIL
IO = 20 A; VCC(A) =VCC(Y)= 1.1Vto 3.6 V - - 0.1 V
IO = 1.1 mA; VCC(A) = VCC(Y) = 1.1 V - - 0.3  VCC(Y) V
IO = 1.7 mA; VCC(A) = VCC(Y) = 1.4 V - - 0.31 V
IO = 1.9 mA; VCC(A) = VCC(Y) = 1.65 V - - 0.31 V
IO = 2.3 mA; VCC(A) = VCC(Y) = 2.3 V - - 0.31 V
IO = 3.1 mA; VCC(A) = VCC(Y) = 2.3 V - - 0.44 V
IO = 2.7 mA; VCC(A) = VCC(Y) = 3.0 V - - 0.31 V
IO = 4.0 mA; VCC(A) = VCC(Y) = 3.0 V - - 0.44 V input leakage
current
VI = 0 V to 3.6 V; VCC(A) =VCC(Y)= 1.1Vto 3.6V - - 0.1 A
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
IOFF power-off
leakage current
A input; VI = 0 V to 3.6 V;
VCC(A) =0V; VCC(Y)=0V to 3.6 V 0.2 A
Y output; VO = 0 V to 3.6 V; VCC(A) =0Vto3.6V;
VI = 0 V or 3.6 V; VCC(Y) =0V 0.2 A
IOFF additional
power-off
leakage current
A input; VI = 0 V to 3.6 V;
VCC(A) =0Vto0.2 V;VCC(Y)= 0 Vto 3.6 V 0.2 A
Y output; VO = 0 V to 3.6 V; VCC(A) =0Vto3.6V;
VI = 0 V or 3.6 V; VCC(Y)=0Vto 0.2 V 0.2 A
ICC supply current port A; VI = GND or VCC(A); IO = 0A
VCC(A) = VCC(Y) = 1.1 V to 3.6 V - - 0.5 A
VCC(A) = 3.6 V; VCC(Y) = 0 V - - 0.5 A
VCC(A) = 0 V; VCC(Y) = 3.6 V - 0.0 - A
port Y; VI = GND or VCC(A); IO = 0A
VCC(A) = VCC(Y) = 1.1 V to 3.6 V - - 0.5 A
VCC(A) = 3.6 V; VCC(Y) = 0 V - 0.0 - A
VCC(A) = 0 V; VCC(Y) = 3.6 V - - 0.5 A
port A and port Y; VI =GND or VCC(A); IO = 0A;
VCC(A) =VCC(Y)= 1.1V to 3.6 V 0.5 A
ICC additional
supply current
A input; VCC(A) = 3.3 V; VCC(Y) = 0 V to 3.6 V; =VCC(A)  0.6 V 40 A input
capacitance
A input; VCC(A) =VCC(Y) =0Vto3.6V; =GNDor VCC(A)
-1.0 - pF output
capacitance
Y output; VO = GND; VCC(Y) = 0 V;
VCC(A) =0Vto3.6V
-1.8 - pF
Tamb = 40 C to +85C
VIH HIGH-level
input voltage
VCC(A) = 1.1 V to 1.95 V; VCC(Y) = 1.1 V to 3.6 V 0.65  VCC(A) -- V
VCC(A) = 2.3 V to 2.7 V; VCC(Y) = 1.1 V to 3.6 V 1.6 - - V
VCC(A) = 3.0 V to 3.6 V; VCC(Y) = 1.1 V to 3.6 V 2.0 - - V
VIL LOW-level input
voltage
VCC(A) = 1.1 V to 1.95 V; VCC(Y) = 1.1 V to 3.6 V - - 0.35  VCC(A)V
VCC(A) = 2.3 V to 2.7 V; VCC(Y) = 1.1 V to 3.6 V - - 0.7 V
VCC(A) = 3.0 V to 3.6 V; VCC(Y) = 1.1 V to 3.6 V - - 0.9 V
VOH HIGH-level
output voltage
VI = VIH
IO = 20 A; VCC(A) =VCC(Y)= 1.1V to 3.6 V VCC(Y)  0.1 - - V
IO = 1.1 mA; VCC(A) = VCC(Y) = 1.1 V 0.7  VCC(Y) -- V
IO = 1.7 mA; VCC(A) = VCC(Y) = 1.4 V 1.03 - - V
IO = 1.9 mA; VCC(A) = VCC(Y) = 1.65 V 1.30 - - V
IO = 2.3 mA; VCC(A) = VCC(Y) = 2.3 V 1.97 - - V
IO = 3.1 mA; VCC(A) = VCC(Y) = 2.3 V 1.85 - - V
IO = 2.7 mA; VCC(A) = VCC(Y) = 3.0 V 2.67 - - V
IO = 4.0 mA; VCC(A) = VCC(Y) = 3.0 V 2.55 - - V
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
VOL LOW-level
output voltage
VI = VIL
IO = 20 A; VCC(A) =VCC(Y)= 1.1Vto 3.6 V - - 0.1 V
IO = 1.1 mA; VCC(A) = VCC(Y) = 1.1 V - - 0.3  VCC(Y) V
IO = 1.7 mA; VCC(A) = VCC(Y) = 1.4 V - - 0.37 V
IO = 1.9 mA; VCC(A) = VCC(Y) = 1.65 V - - 0.35 V
IO = 2.3 mA; VCC(A) = VCC(Y) = 2.3 V - - 0.33 V
IO = 3.1 mA; VCC(A) = VCC(Y) = 2.3 V - - 0.45 V
IO = 2.7 mA; VCC(A) = VCC(Y) = 3.0 V - - 0.33 V
IO = 4.0 mA; VCC(A) = VCC(Y) = 3.0 V - - 0.45 V input leakage
current
VI = 0 V to 3.6 V; VCC(A) =VCC(Y)= 1.1Vto 3.6V - - 0.5 A
IOFF power-off
leakage current
A input; VI = 0 V to 3.6 V;
VCC(A) =0V; VCC(Y)=0V to 3.6 V 0.5 A
Y output; VO = 0 V to 3.6 V; VCC(A) =0Vto3.6V;
VI = 0 V or 3.6 V; VCC(Y) =0V 0.5 A
IOFF additional
power-off
leakage current
A input; VI = 0 V to 3.6 V;
VCC(A) =0Vto0.2 V;VCC(Y)= 0 Vto 3.6 V 0.6 A
Y output; VO = 0 V to 3.6 V; VCC(A) =0Vto3.6V;
VI = 0 V or 3.6 V; VCC(Y)=0Vto 0.2 V 0.6 A
ICC supply current port A; VI = GND or VCC(A); IO = 0A
VCC(A) = VCC(Y) = 1.1 V to 3.6 V - - 0.9 A
VCC(A) = 3.6 V; VCC(Y) = 0 V - - 0.9 A
VCC(A) = 0 V; VCC(Y) = 3.6 V - 0.0 - A
port Y; VI = GND or VCC(A); IO = 0A
VCC(A) = VCC(Y) = 1.1 V to 3.6 V - - 0.9 A
VCC(A) = 3.6 V; VCC(Y) = 0 V - 0.0 - A
VCC(A) = 0 V; VCC(Y) = 3.6 V - - 0.9 A
port A and port Y; VI =GND or VCC(A); IO = 0A;
VCC(A) =VCC(Y)= 1.1V to 3.6 V 0.9 A
ICC additional
supply current
A input; VCC(A) = 3.3 V; VCC(Y) = 0 V to 3.6 V; =VCC(A)  0.6 V 50 A
Tamb = 40 C to +125C
VIH HIGH-level
input voltage
VCC(A) = 1.1 V to 1.95 V; VCC(Y) = 1.1 V to 3.6 V 0.7  VCC(A) -- V
VCC(A) = 2.3 V to 2.7 V; VCC(Y) = 1.1 V to 3.6 V 1.6 - - V
VCC(A) = 3.0 V to 3.6 V; VCC(Y) = 1.1 V to 3.6 V 2.0 - - V
VIL LOW-level input
voltage
VCC(A) = 1.1 V to 1.95 V; VCC(Y) = 1.1 V to 3.6 V - - 0.3  VCC(A) V
VCC(A) = 2.3 V to 2.7 V; VCC(Y) = 1.1 V to 3.6 V - - 0.7 V
VCC(A) = 3.0 V to 3.6 V; VCC(Y) = 1.1 V to 3.6 V - - 0.9 V
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
VOH HIGH-level
output voltage
VI = VIH
IO = 20 A; VCC(A) =VCC(Y)= 1.1V to 3.6 V VCC(Y)  0.11- - V
IO = 1.1 mA; VCC(A) = VCC(Y) = 1.1 V 0.6  VCC(Y) -- V
IO = 1.7 mA; VCC(A) = VCC(Y) = 1.4 V 0.93 - - V
IO = 1.9 mA; VCC(A) = VCC(Y) = 1.65 V 1.17 - - V
IO = 2.3 mA; VCC(A) = VCC(Y) = 2.3 V 1.77 - - V
IO = 3.1 mA; VCC(A) = VCC(Y) = 2.3 V 1.67 - - V
IO = 2.7 mA; VCC(A) = VCC(Y) = 3.0 V 2.40 - - V
IO = 4.0 mA; VCC(A) = VCC(Y) = 3.0 V 2.30 - - V
VOL LOW-level
output voltage
VI = VIL
IO = 20 A; VCC(A) =VCC(Y)= 1.1Vto 3.6 V - - 0.11 V
IO = 1.1 mA; VCC(A) = VCC(Y) = 1.1 V - - 0.33  VCC(Y)V
IO = 1.7 mA; VCC(A) = VCC(Y) = 1.4 V - - 0.41 V
IO = 1.9 mA; VCC(A) = VCC(Y) = 1.65 V - - 0.39 V
IO = 2.3 mA; VCC(A) = VCC(Y) = 2.3 V - - 0.36 V
IO = 3.1 mA; VCC(A) = VCC(Y) = 2.3 V - - 0.50 V
IO = 2.7 mA; VCC(A) = VCC(Y) = 3.0 V - - 0.36 V
IO = 4.0 mA; VCC(A) = VCC(Y) = 3.0 V - - 0.50 V input leakage
current
VI = 0 V to 3.6 V; VCC(A) =VCC(Y)= 1.1Vto 3.6V - - 0.75 A
IOFF power-off
leakage current
A input; VI = 0 V to 3.6 V;
VCC(A) =0V; VCC(Y)=0V to 3.6 V 0.75 A
Y output; VO = 0 V to 3.6 V; VCC(A) =0Vto3.6V;
VI = 0 V or 3.6 V; VCC(Y) =0V 0.75 A
IOFF additional
power-off
leakage current
A input; VI = 0 V to 3.6 V;
VCC(A) =0Vto0.2 V;VCC(Y)= 0 Vto 3.6 V 0.75 A
Y output; VO = 0 V to 3.6 V; VCC(A) =0Vto3.6V;
VI = 0 V or 3.6 V; VCC(Y)=0Vto 0.2 V 0.75 A
ICC supply current port A; VI = GND or VCC(A); IO = 0A
VCC(A) = VCC(Y) = 1.1 V to 3.6 V - - 1.4 A
VCC(A) = 3.6 V; VCC(Y) = 0 V - - 1.4 A
VCC(A) = 0 V; VCC(Y) = 3.6 V - 0.0 - A
port Y; VI = GND or VCC(A); IO = 0A
VCC(A) = VCC(Y) = 1.1 V to 3.6 V - - 1.4 A
VCC(A) = 3.6 V; VCC(Y) = 0 V - 0.0 - A
VCC(A) = 0 V; VCC(Y) = 3.6 V - - 1.4 A
port A and port Y; VI =GND or VCC(A); IO = 0A;
VCC(A) =VCC(Y)= 1.1V to 3.6 V 1.4 A
ICC additional
supply current
A input; VCC(A) = 3.3 V; VCC(Y) = 0 V to 3.6 V; =VCC(A) 0.6 V 75 A
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground=0V).
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
11. Dynamic characteristicsTable 8. Dynamic characteristics
Voltages are referenced to GND (ground=0 V); for test circuit see Figure9.
CL = 5 pF; VCC(A) = 1.1 V to 1.3 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.6 9.8 25.4 2.3 25.9 25.9 ns
VCC(Y) = 1.4 V to 1.6 V 2.4 7.1 15.3 2.2 16.3 16.7 ns
VCC(Y) = 1.65 V to 1.95 V 2.1 6.0 12.7 1.9 13.8 14.3 ns
VCC(Y) = 2.3 V to 2.7 V 2.0 5.1 9.8 2.0 10.5 10.9 ns
VCC(Y) = 3.0 V to 3.6 V 2.1 4.7 8.8 1.9 9.1 9.3 ns
CL = 5 pF; VCC(A) = 1.4 V to 1.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.3 9.1 23.9 2.0 24.5 24.5 ns
VCC(Y) = 1.4 V to 1.6 V 2.1 6.4 13.6 1.9 14.7 15.2 ns
VCC(Y) = 1.65 V to 1.95 V 1.8 5.3 10.9 1.6 12.1 12.6 ns
VCC(Y) = 2.3 V to 2.7 V 1.7 4.3 7.8 1.6 8.7 9.2 ns
VCC(Y) = 3.0 V to 3.6 V 1.8 3.9 6.6 1.6 7.1 7.5 ns
CL = 5 pF; VCC(A) = 1.65 V to 1.95 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.2 8.8 23.2 1.9 23.9 24.0 ns
VCC(Y) = 1.4 V to 1.6 V 2.0 6.0 13.0 1.8 14.1 14.6 ns
VCC(Y) = 1.65 V to 1.95 V 1.8 4.9 10.3 1.5 11.4 12.0 ns
VCC(Y) = 2.3 V to 2.7 V 1.6 3.9 7.2 1.5 8.0 8.5 ns
VCC(Y) = 3.0 V to 3.6 V 1.7 3.5 5.9 1.5 6.4 6.8 ns
CL = 5 pF; VCC(A) = 2.3 V to 2.7 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.2 8.4 22.8 1.9 23.4 23.4 ns
VCC(Y) = 1.4 V to 1.6 V 1.9 5.7 12.3 1.8 13.4 14.0 ns
VCC(Y) = 1.65 V to 1.95 V 1.7 4.6 9.6 1.5 10.7 11.2 ns
VCC(Y) = 2.3 V to 2.7 V 1.5 3.5 6.3 1.5 7.2 7.7 ns
VCC(Y) = 3.0 V to 3.6 V 1.6 3.1 5.1 1.4 5.6 6.0 ns
CL = 5 pF; VCC(A) = 3.0 V to 3.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.2 8.1 22.5 1.9 22.9 22.9 ns
VCC(Y) = 1.4 V to 1.6 V 1.9 5.4 12.0 1.8 12.9 13.4 ns
VCC(Y) = 1.65 V to 1.95 V 1.7 4.3 9.2 1.5 10.2 10.7 ns
VCC(Y) = 2.3 V to 2.7 V 1.5 3.3 6.0 1.5 6.7 7.2 ns
VCC(Y) = 3.0 V to 3.6 V 1.6 2.9 4.8 1.4 5.2 5.5 ns
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
CL = 10 pF; VCC(A) = 1.1 V to 1.3 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.6 10.7 27.1 2.5 27.6 27.6 ns
VCC(Y) = 1.4 V to 1.6 V 2.6 7.7 16.7 2.3 17.5 17.6 ns
VCC(Y) = 1.65 V to 1.95 V 2.7 6.6 13.4 2.4 14.2 14.7 ns
VCC(Y) = 2.3 V to 2.7 V 2.2 5.6 10.3 2.2 11.0 11.4 ns
VCC(Y) = 3.0 V to 3.6 V 2.5 5.3 9.5 2.2 9.7 10.0 ns
CL = 10 pF; VCC(A) = 1.4 V to 1.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.4 10.0 25.6 2.2 26.1 26.1 ns
VCC(Y) = 1.4 V to 1.6 V 2.4 7.0 15.0 2.0 15.8 16.4 ns
VCC(Y) = 1.65 V to 1.95 V 2.4 5.9 11.6 2.1 12.5 13.1 ns
VCC(Y) = 2.3 V to 2.7 V 2.0 4.8 8.4 1.9 9.2 9.7 ns
VCC(Y) = 3.0 V to 3.6 V 2.2 4.4 7.4 1.9 7.7 8.1 ns
CL = 10 pF; VCC(A) = 1.65 V to 1.95 V
tpd propagation delay A to Y; see Figure8
VCC(Y) = 1.1 V to 1.3 V 2.3 9.7 24.8 2.1 25.5 25.7 ns
VCC(Y) = 1.4 V to 1.6 V 2.3 6.6 14.3 2.0 15.3 15.8 ns
VCC(Y) = 1.65 V to 1.95 V 2.3 5.5 11.0 2.0 11.9 12.5 ns
VCC(Y) = 2.3 V to 2.7 V 1.9 4.4 7.7 1.8 8.6 9.0 ns
VCC(Y) = 3.0 V to 3.6 V 2.1 4.0 6.6 1.8 7.1 7.4 ns
CL = 10 pF; VCC(A) = 2.3 V to 2.7 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.3 9.3 24.4 2.1 25.1 25.1 ns
VCC(Y) = 1.4 V to 1.6 V 2.2 6.3 13.6 1.9 14.6 15.1 ns
VCC(Y) = 1.65 V to 1.95 V 2.2 5.1 10.3 2.0 11.2 11.7 ns
VCC(Y) = 2.3 V to 2.7 V 1.8 4.1 6.9 1.8 7.7 8.2 ns
VCC(Y) = 3.0 V to 3.6 V 2.0 3.6 5.8 1.7 6.3 6.6 ns
CL = 10 pF; VCC(A) = 3.0 V to 3.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.3 9.0 24.2 2.1 24.6 24.6 ns
VCC(Y) = 1.4 V to 1.6 V 2.2 6.0 13.3 1.9 14.1 14.6 ns
VCC(Y) = 1.65 V to 1.95 V 2.2 4.9 9.9 2.0 10.6 11.2 ns
VCC(Y) = 2.3 V to 2.7 V 1.8 3.9 6.5 1.8 7.3 7.7 ns
VCC(Y) = 3.0 V to 3.6 V 2.0 3.5 5.4 1.7 5.8 6.2 ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure9.
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
CL = 15 pF; VCC(A) = 1.1 V to 1.3 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 3.0 11.5 28.6 2.8 29.2 29.2 ns
VCC(Y) = 1.4 V to 1.6 V 3.1 8.3 17.3 2.7 18.6 19.1 ns
VCC(Y) = 1.65 V to 1.95 V 2.8 7.1 14.1 2.7 15.2 15.8 ns
VCC(Y) = 2.3 V to 2.7 V 2.6 6.1 11.1 2.7 11.6 12.1 ns
VCC(Y) = 3.0 V to 3.6 V 2.9 5.7 9.9 2.6 10.3 10.6 ns
CL = 15 pF; VCC(A) = 1.4 V to 1.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.8 10.8 27.1 2.6 27.7 27.7 ns
VCC(Y) = 1.4 V to 1.6 V 2.8 7.6 15.7 2.4 17.0 17.6 ns
VCC(Y) = 1.65 V to 1.95 V 2.5 6.3 12.3 2.4 13.5 14.1 ns
VCC(Y) = 2.3 V to 2.7 V 2.3 5.3 9.2 2.4 9.9 10.3 ns
VCC(Y) = 3.0 V to 3.6 V 2.6 4.9 7.8 2.3 8.3 8.7 ns
CL = 15 pF; VCC(A) = 1.65 V to 1.95 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.7 10.5 26.4 2.5 27.1 27.3 ns
VCC(Y) = 1.4 V to 1.6 V 2.7 7.2 15.0 2.3 16.4 17.0 ns
VCC(Y) = 1.65 V to 1.95 V 2.4 6.0 11.7 2.3 12.8 13.5 ns
VCC(Y) = 2.3 V to 2.7 V 2.2 4.9 8.5 2.2 9.2 9.7 ns
VCC(Y) = 3.0 V to 3.6 V 2.5 4.5 7.1 2.2 7.7 8.0 ns
CL = 15 pF; VCC(A) = 2.3 V to 2.7 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.6 10.1 26.0 2.4 26.7 26.7 ns
VCC(Y) = 1.4 V to 1.6 V 2.7 6.9 14.3 2.3 15.7 16.3 ns
VCC(Y) = 1.65 V to 1.95 V 2.4 5.6 10.9 2.2 12.1 12.7 ns
VCC(Y) = 2.3 V to 2.7 V 2.1 4.5 7.6 2.2 8.4 8.9 ns
VCC(Y) = 3.0 V to 3.6 V 2.4 4.1 6.2 2.1 6.8 7.2 ns
CL = 15 pF; VCC(A) = 3.0 V to 3.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 2.6 9.8 25.7 2.4 26.2 26.2 ns
VCC(Y) = 1.4 V to 1.6 V 2.7 6.6 14.0 2.3 15.2 15.7 ns
VCC(Y) = 1.65 V to 1.95 V 2.4 5.4 10.5 2.2 11.6 12.1 ns
VCC(Y) = 2.3 V to 2.7 V 2.1 4.3 7.3 2.2 7.9 8.4 ns
VCC(Y) = 3.0 V to 3.6 V 2.4 3.9 5.9 2.1 6.4 6.8 ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure9.
NXP Semiconductors 74AUP1T34
Low-power dual supply translating buffer
CL = 30 pF; VCC(A) = 1.1 V to 1.3 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 3.7 13.7 32.9 3.5 33.5 33.5 ns
VCC(Y) = 1.4 V to 1.6 V 3.6 9.8 19.5 3.6 20.9 21.4 ns
VCC(Y) = 1.65 V to 1.95 V 3.7 8.4 15.9 3.5 17.0 17.7 ns
VCC(Y) = 2.3 V to 2.7 V 3.0 7.2 12.2 3.4 12.7 13.2 ns
VCC(Y) = 3.0 V to 3.6 V 3.8 6.8 10.9 3.4 12.2 12.5 ns
CL = 30 pF; VCC(A) = 1.4 V to 1.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 3.5 13.1 31.5 3.2 32.0 32.0 ns
VCC(Y) = 1.4 V to 1.6 V 3.3 9.1 17.8 3.3 19.2 19.9 ns
VCC(Y) = 1.65 V to 1.95 V 3.4 7.6 14.2 3.2 15.4 16.0 ns
VCC(Y) = 2.3 V to 2.7 V 2.8 6.4 10.3 3.1 11.0 11.5 ns
VCC(Y) = 3.0 V to 3.6 V 3.5 5.9 8.9 3.1 10.1 10.5 ns
CL = 30 pF; VCC(A) = 1.65 V to 1.95 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 3.4 12.7 30.7 3.1 31.5 31.5 ns
VCC(Y) = 1.4 V to 1.6 V 3.2 8.8 17.2 3.2 18.7 19.3 ns
VCC(Y) = 1.65 V to 1.95 V 3.3 7.3 13.5 3.1 14.7 15.4 ns
VCC(Y) = 2.3 V to 2.7 V 2.7 6.0 9.6 3.0 10.4 10.9 ns
VCC(Y) = 3.0 V to 3.6 V 3.4 5.6 8.2 2.9 9.4 9.8 ns
CL = 30 pF; VCC(A) = 2.3 V to 2.7 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 3.3 12.4 30.3 3.1 31.0 31.0 ns
VCC(Y) = 1.4 V to 1.6 V 3.2 8.4 16.5 3.1 18.0 18.7 ns
VCC(Y) = 1.65 V to 1.95 V 3.2 6.9 12.8 3.0 14.0 14.6 ns
VCC(Y) = 2.3 V to 2.7 V 2.6 5.6 8.8 2.9 9.6 10.1 ns
VCC(Y) = 3.0 V to 3.6 V 3.3 5.2 7.3 2.9 8.5 9.0 ns
CL = 30 pF; VCC(A) = 3.0 V to 3.6 V
tpd propagation delay A to Y; see Figure8 [2]
VCC(Y) = 1.1 V to 1.3 V 3.3 12.0 30.0 3.1 30.5 30.5 ns
VCC(Y) = 1.4 V to 1.6 V 3.2 8.1 16.2 3.1 17.5 18.1 ns
VCC(Y) = 1.65 V to 1.95 V 3.2 6.7 12.4 3.0 13.4 14.1 ns
VCC(Y) = 2.3 V to 2.7 V 2.6 5.5 8.5 2.9 9.1 9.6 ns
VCC(Y) = 3.0 V to 3.6 V 3.2 5.0 7.0 2.9 8.1 8.5 ns
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground=0 V); for test circuit see Figure9.

Partno	Mfg	Dc	Qty	Available	Descript
74AUP1T34GF	NXP	N/a	22500	avai	Low-power dual supply translating buffer