74ALVCH16374TX ,Low Voltage 16-Bit D-Type Flip-Flop with Busholdapplications with output compatibility up to 3.6V.CC
74ALVCH16374TX
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
74ALVCH16374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold September 2001 Revised February 2002 74ALVCH16374 Low Voltage 16-Bit D-Type Flip-Flop with Bushold General Description Features The ALVCH16374 contains sixteen non-inverting D-type1.65V to 3.6V V supply operation CC flip-flops with 3-STATE outputs and is intended for bus ori- 3.6V tolerant control inputs and outputs ented applications. The device is byte controlled. A buff- Bushold on data inputs eliminates the need for external ered clock (CP) and output enable (OE) are common to pull-up/pull-down resistors each byte and can be shorted together for full 16-bit opera- t tion. PD The ALVCH16374 data inputs include active bushold cir- 4.2 ns max for 3.0V to 3.6V V CC cuitry, eliminating the need for external pull-up resistors to 5.3 ns max for 2.3V to 2.7V V CC hold unused or floating data inputs at a valid logic level. 7.8 ns max for 1.65V to 1.95V V CC The 74ALVCH16374 is designed for low voltage (1.65V to Uses patented noise/EMI reduction circuitry 3.6V) V applications with output compatibility up to 3.6V. CC Latch-up conforms to JEDEC JED78 The 74ALVCH16374 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain-ESD performance: ing low CMOS power dissipation. Human body model > 2000V Machine model > 200V Ordering Code: Package Order Number Package Descriptions Number 74ALVCH16374T MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 1) Note 1: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © 2002 DS500627
