SN74ALVCH16374DL ,16-Bit Edge-Triggered D-Type Flip-Flop With 3-State OutputsMAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74ALVCH16501 ,18-Bit Universal Bus Transceiver With 3-State OutputsSCES024J–JULY 1995–REVISED OCTOBER 2004DESCRIPTION/ORDERING INFORMATION (CONTINUED)To ensure the hi ..
SN74ALVCH16501 ,18-Bit Universal Bus Transceiver With 3-State OutputsFEATURESDGG OR DL PACKAGE• Member of the Texas Instruments Widebus™(TOP VIEW)Family1 56OEAB GND• UB ..
SN74ALVCH16501DGG , 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74ALVCH16501DGGR ,18-Bit Universal Bus Transceiver With 3-State OutputsMAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)MIN MAX UNITV Supp ..
SN74ALVCH16501DGGR ,18-Bit Universal Bus Transceiver With 3-State OutputsSCES024J–JULY 1995–REVISED OCTOBER 2004(1)FUNCTION TABLEINPUTSOUTPUTBOEAB LEAB CLKAB AL X X X ZH H ..
SN74LVC245APWRE4 ,Octal Bus Transceiver With 3-State Outputs 20-TSSOP -40 to 125Table of Contents9.1 Overview.... 91
SN74LVC245APWRG3 ,Octal Bus Transceiver With 3-State Outputs 20-TSSOP -40 to 125Table of Contents9.1 Overview.... 91
SN74LVC245APWRG4 ,Octal Bus Transceiver With 3-State Outputs 20-TSSOP -40 to 125 SCAS218X–JANUARY 1993–REVISED JANUARY 20156 Pin Configuration and FunctionsGQN OR ZQN PACKAGE(TOP ..
SN74LVC245APWRG4 ,Octal Bus Transceiver With 3-State Outputs 20-TSSOP -40 to 1257 Specifications7.1 Absolute
SN74LVC245ARGYR ,Octal Bus Transceiver With 3-State OutputsMaximum Ratings.. 412 Layout.... 117.2 ESD Ratings........ 412.1 Layout Guidelines.... 117.3 Recomm ..
SN74LVC245ARGYR ,Octal Bus Transceiver With 3-State OutputsMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITV S ..
74ALVCH16374DGGRE4-74ALVCH16374ZQLR-SN74ALVCH16374-SN74ALVCH16374DGGR-SN74ALVCH16374DL
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-TSSOP -40 to 85
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)1OE
1Q1
1Q2
GND
1Q3
1Q4
VCC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VCC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1CLK
1D1
1D2
GND
1D3
1D4
VCC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VCC
2D5
2D6
GND
2D7
2D8
2CLK does not affect internal operationsof the flip-flop. Old data canbe retainedor new data canbe entered while
SN74ALVCH16374 EDGE-TRIGGERED D-TYPE FLIP-FLOP Memberof Texas Instruments Widebus™
Family Operates From 1.65to 3.6V Maxtpdof 4.2at 3.3V ±24-mA
Output Driveat 3.3V Bus Hold on Inputs Eliminates the Need
for External Resistors Latch-Up Performance Exceeds 250 mA Per
JESD17 ESD Protection Exceeds JESD22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A)This 16-bit edge-triggered D-type flip-flopis designed
for 1.65-Vto 3.6-V VCC operation. SN74ALVCH16374is particularly suitable for
implementing buffer registers, I/O ports, bidirectional
bus drivers, and registers.It can be usedas
two 8-bit flip-flops or one 16-bit flip-flop. On the
positive transition of the clock (CLK) input, the outputsof the take on the logic levelsat
the data (D) inputs. OE can be usedto place the
eight outputsina normal logic state (highor
low logic levels) the high-impedance state.In the
high-impedance outputs neither load nor
drive the bus lines significantly. The high-impedance
state and the increased drive provide the capabilityto
drive bus lines need for interfaceor pullup
components.
the outputs are high-impedance state. ensure the high-impedance state during power upor power down, OE should be tiedto VCC througha pullup
resistor; the minimum valueof the resistoris determinedby current-sinking capabilityof the driver.
Active bus-hold holds unusedor undriven inputsat logic state. Useof pullupor pulldown resistors
with the bus-holdis not recommended.
