74ALVCH16373TX ,Low Voltage 16-Bit Transparent Latch with Busholdapplications with output compatibility up to 3.6V.CC
74ALVCH16373TX
Low Voltage 16-Bit Transparent Latch with Bushold
74ALVCH16373 Low Voltage 16-Bit Transparent Latch with Bushold October 2001 Revised February 2002 74ALVCH16373 Low Voltage 16-Bit Transparent Latch with Bushold General Description Features The ALVCH16373 contains sixteen non-inverting latches1.65V to 3.6V V supply operation CC with 3-STATE outputs and is intended for bus oriented 3.6V tolerant control inputs and outputs applications. The device is byte controlled. The flip-flops Bushold on data inputs eliminates the need for external appear to be transparent to the data when the Latch pull-up/pull-down resistors Enable (LE) is HIGH. When LE is LOW, the data that meets t (I to O ) the setup time is latched. Data appears on the bus when PD n n the Output Enable (OE) is LOW. When OE is HIGH, the 3.6 ns max for 3.0V to 3.6V V CC outputs are in a high impedance state. 4.5 ns max for 2.3V to 2.7V V CC The ALVCH16373 data inputs include active bushold cir- 6.8 ns max for 1.65V to 1.95V V cuitry, eliminating the need for external pull-up resistors to CC hold unused or floating data inputs at a valid logic level.Uses patented noise/EMI reduction circuitry The 74ALVCH16373 is designed for low voltage (1.65V toLatch-up conforms to JEDEC JED78 3.6V) V applications with output compatibility up to 3.6V. CCESD performance: The 74ALVCH16373 is fabricated with an advanced CMOS Human body model > 2000V technology to achieve high speed operation while maintain- Machine model > 200V ing low CMOS power dissipation. Ordering Code: Package Order Number Package Description Number 74ALVCH16373T MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol © 2002 DS500631
