74ALVCH16373DL ,2.5 V / 3.3 V 16-bit D-type transparent latch (3-State)PIN CONFIGURATION• Wide supply voltage range of 1.2V to 3.6V1OE 1 48 1LE• Complies with JEDEC stand ..
74ALVCH16373DL ,2.5 V / 3.3 V 16-bit D-type transparent latch (3-State)INTEGRATED CIRCUITS74ALVCH163732.5V/3.3V 16-bit D-type transparent latch(3-State)Product specificat ..
74ALVCH16373TX ,Low Voltage 16-Bit Transparent Latch with Busholdapplications with output compatibility up to 3.6V.CC
74ALVCH16373DGG-74ALVCH16373DL
2.5V/3.3V 16-bit D-type transparent latch 3-State
Product specification
Supersedes data of 1998 Jun 29
IC24 Data Handbook
1999 Sep 20
Philips Semiconductors Product specification
74ALVCH1637316-bit D-type transparent latch (3-State)
FEATURES Wide supply voltage range of 1.2V to 3.6V Complies with JEDEC standard no. 8-1A CMOS low power consumption MULTIBYTETM flow-through standard pin-out architecture Low inductance multiple VCC and ground pins for minimum noise
and ground bounce Direct interface with TTL levels All data inputs have bus hold Output drive capability 50Ω transmission lines @ 85°C Current drive ±24 mA at 3.0 V
DESCRIPTIONThe 74ALVCH16373 is a 16-bit D-type transparent latch featuring
separate D-type inputs for each latch and 3-State outputs for bus
oriented applications. Incorporates bus hold data inputs which
eliminate the need for external pull-up or pull-down resistors to hold
unused inputs. One latch enable (LE) input and one output enable
(OE) are provided per 8-bit section.
The 74ALVCH16373 consists of 2 sections of eight D-type
transparent latches with 3-State true outputs. When LE is HIGH,
data at the Dn inputs enter the latches. In this condition the latches
are transparent, i.e., a latch output will change each time its
corresponding D-input changes.
When LE is LOW the latches store the information that was present
at the D-inputs a set-up time preceding the HIGH-to-LOW transition
of LE. When OE is LOW, the contents of the eight latches are
available at the outputs. When OE is HIGH, the outputs go to the
high impedance OFF-state. Operation of the OE input does not
affect the state of the latches.
PIN CONFIGURATION
QUICK REFERENCE DATAGND = 0V; Tamb = 25°C; tr = tf ≤ 2.5ns
NOTE: CPD is used to determine the dynamic power dissipation (PD in μW):
PD = CPD × VCC 2 × fi + � (CL × VCC 2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;
fo = output frequency in MHz; VCC = supply voltage in V; � (CL × VCC 2 × fo) = sum of outputs.
ORDERING INFORMATION
Philips Semiconductors Product specification
74ALVCH1637316-bit D-type transparent latch (3-State)
PIN DESCRIPTION
LOGIC SYMBOL
LOGIC DIAGRAM
FUNCTION TABLE (per section of eight bits) = HIGH voltage level = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition = LOW voltage level
Philips Semiconductors Product specification
74ALVCH1637316-bit D-type transparent latch (3-State)
LOGIC SYMBOL (IEEE/IEC)
BUS HOLD CIRCUIT
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74ALVCH1637316-bit D-type transparent latch (3-State)
ABSOLUTE MAXIMUM RATINGSIn accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
NOTES: Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICSOver recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
Philips Semiconductors Product specification
74ALVCH1637316-bit D-type transparent latch (3-State)
DC ELECTRICAL CHARACTERISTICS (Continued)Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
NOTES: All typical values are at Tamb = 25°C. Valid for data inputs of bus hold parts.
