74ALVC2245 ,Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26-Ohm Series Resistors in B Outputsapplications such as memory address drivers, clock driv-ers, and bus transceivers transmitters 9.8 ..
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74ALVC245MTC ,Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputsapplications with I/O compatibility up to 3.6V.CC 3.4 ns max for 3.0V to 3.6V VCCThe 74ALVC245 is f ..
74ALVC245MTC ,Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputsapplications. The T/R input determines the direction
74ALVC2245
Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26-Ohm Series Resistors in B Outputs
74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in B Outputs February 2002 Revised February 2002 74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in B Outputs General Description Features The ALVC2245 contains eight non-inverting bidirectional1.65V to 3.6V V supply operation CC buffers with 3-STATE outputs and is intended for bus ori- 3.6V tolerant inputs and outputs ented applications. The T/R input determines the direction 26Ω series resistors in B Port outputs of data flow. The OE input disables both the A and B ports Power-off high impedance inputs and outputs by placing them in a high impedance state. Supports Live Insertion and Withdrawal (Note 1) The 74ALVC2245 is designed for low voltage (1.65V to 3.6V) V applications with I/O compatibility up to 3.6V.t (A to B) CC PD The ALVC2245 is also designed with 26Ω series resistance 4.9 ns max for 3.0V to 3.6V V CC in the B Port outputs. This design reduces line noise in 6.1 ns max for 2.3V to 2.7V V CC applications such as memory address drivers, clock driv- ers, and bus transceivers transmitters 9.8 ns max for 1.65V to 1.95V V CC The 74ALVC2245 is fabricated with an advanced CMOSUses patented Quiet Series noise/EMI reduction technology to achieve high-speed operation while main- circuitry taining low CMOS power dissipation. Latchup conforms to JEDEC JED78 ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high impedance state during power up and power down, OE should be tied to V through a pull up resistor. The minimum n CC value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74ALVC2245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ALVC2245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) T/R Transmit/Receive Input A –A Side A Inputs or 3-STATE Outputs 0 7 B –B Side B Inputs or 3-STATE Outputs 0 7 Quiet Series is a trademark of . © 2002 ds500717
