74ALVC16835 ,Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputsapplications with I/O capability up to 3.6V.CCHuman body model > 2000VThe 74ALVC16835 is fabricated ..
74ALVC16835 ,Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and OutputsFeaturesThe ALVC16835 low voltage 18-bit universal bus driver
74ALVC16835
Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs
74ALVC16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs September 2001 Revised February 2002 74ALVC16835 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC16835 low voltage 18-bit universal bus driverCompatible with PC100 DIMM module specifications combines D-type latches and D-type flip-flops to allow data1.65V to 3.6V V supply operation CC flow in transparent, latched and clocked modes. 3.6V tolerant inputs and outputs Data flow is controlled by output-enable (OE), latch-enable t (CLK to O ) PD n (LE), and clock (CLK) inputs. The device operates in 4.5 ns max for 3.0V to 3.6V V Transparent Mode when LE is held HIGH. The device CC 5.5 ns max for 2.3V to 2.7V V operates in clocked mode when LE is LOW and CLK is tog- CC gled. Data transfers from the Inputs (I ) to Ouputs (O ) on a 9.2 ns max for 1.65V to 1.95V V n n CC Positive Edge Transition of the Clock. When OE is LOW, Power-off high impedance inputs and outputs the output data is enabled. When OE is HIGH the output Supports live insertion/withdrawal (Note 1) port is in a high impedance state. Latchup conforms to JEDEC JED78 The 74ALVC16835 is designed for low voltage (1.65V to ESD performance: 3.6V) V applications with I/O capability up to 3.6V. CC Human body model > 2000V The 74ALVC16835 is fabricated with an advanced CMOS Machine model >200V technology to achieve high speed operation while maintain- ing low CMOS power dissipation. Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V (OE to GND) through a pulldown resistor; CC the minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Package Order Number Package Description Number 74ALVC16835MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2002 DS500645
