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74ALVC162827TXFAIRCHILDN/a966avaiLow Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the Outputs


74ALVC162827TX ,Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the OutputsFunctional DescriptionThe 74ALVC162827 contains twenty non-inverting bufferswith 3-STATE outputs. T ..
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74ALVC162827TX
Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26 Ohm Series Resistors in the Outputs
74ALVC162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in the Outputs November 2001 Revised November 2001 74ALVC162827 Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in the Outputs General Description Features The ALVC162827 contains twenty non-inverting buffers1.65V to 3.6V V supply operation CC with 3-STATE outputs to be employed as a memory and 3.6V tolerant inputs and outputs address driver, clock driver, or bus oriented transmitter/ 26Ω series resistors in outputs receiver. The device is byte controlled. Each byte has NOR t output enables for maximum control flexibility. PD The 74ALVC162827 is designed for low voltage (1.65V to 3.9 ns max for 3.0V to 3.6V V CC 3.6V) V applications with I/O capability up to 3.6V. The CC 4.6 ns max for 2.3V to 2.7V V CC ALVC162827 is also designed with 26Ω resistors in the 8.2 ns max for 1.65V to 1.95V V CC outputs. Power-off high impedance inputs and outputs The 74ALVC162827 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain-Supports live insertion and withdrawal (Note 1) ing low CMOS power dissipation.Uses patented noise/EMI reduction circuitry Latchup conforms to JEDEC JED78 ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V through a pull-up resistor; the minimum CC value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74ALVC162827T MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names Description OE Output Enable Input (Active LOW) n I –I Inputs 0 19 O –O Outputs 0 19 © 2001 DS500698
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