74ALVC16244MTD ,Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputsapplications with I/O capability up to 3.6V.3.5 ns max for 2.3V to 2.7V V CCCCThe 74ALVC16244 is fa ..
74ALVC16244MTDX ,Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and OutputsFeatures3-STATE outputs to be employed as a memory and
74ALVC16244MTD-74ALVC16244MTDX
Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
74ALVC16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs October 2001 Revised October 2001 74ALVC16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs General Description The ALVC16244 contains sixteen non-inverting buffers with Features 3-STATE outputs to be employed as a memory and 1.65V–3.6V V supply operation address driver, clock driver, or bus oriented transmitter/ CC receiver. The device is nibble (4-bit) controlled. Each nibble 3.6V tolerant inputs and outputs has separate 3-STATE control inputs which can be shorted t PD together for full 16-bit operation. 3.0 ns max for 3.0V to 3.6V V CC The 74ALVC16244 is designed for low voltage (1.65V to 3.6V) V applications with I/O capability up to 3.6V. 3.5 ns max for 2.3V to 2.7V V CC CC The 74ALVC16244 is fabricated with an advanced CMOS 6.0 ns max for 1.65V to 1.95V V CC technology to achieve high speed operation while maintain- Power-off high impedance inputs and outputs ing low CMOS power dissipation. Supports live insertion and withdrawal (Note 1) Uses patented noise/EMI reduction circuitry Latch-up conforms to JEDEC JED98 ESD performance: Human body model > 2000V Machine model > 200V Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to V through a pull-up resistor; the minimum CC value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74ALVC16244GX BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2) [Tape and Reel] 74ALVC16244MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2001 DS500677
