74AHC595PW ,8-bit serial-in/serial-out or parallel-out shift register with output latches; 3-stateINTEGRATED CIRCUITSDATA SHEET74AHC595; 74AHCT5958-bit serial-in/serial or parallel-outshift registe ..
74AHC74D ,Dual D-type flip-flop with set and reset; positive-edge triggerGeneral descriptionThe 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatiblew ..
74AHC74PW ,Dual D-type flip-flop with set and reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEET74AHC74; 74AHCT74Dual D-type flip-flop with set andreset; positive-edg ..
74AHC86D ,Quad 2-input EXCLUSIVE-OR gateFeatures■ Balanced propagation delays■ All inputs have a Schmitt-trigger action■ Inputs accepts vol ..
74AHC86D ,Quad 2-input EXCLUSIVE-OR gateINTEGRATED CIRCUITSDATA SHEET74AHC86; 74AHCT86Quad 2-input EXCLUSIVE-OR gateProduct specification 19 ..
74AHC86PW ,Quad 2-input EXCLUSIVE-OR gateLogic diagram (one gate) Fig 3. IEC logic symbol74AHC_AHCT86_2 NXP B.V. 2007. All rights reserved. ..
74HC373PW ,74HC/HCT373; Octal D-type transparent latch; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC374 ,3-stateMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agai ..
74HC374D ,74HC/HCT374; Octal D-type flip-flop; positive edge-trigger; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC374DB ,Octal D-type flip-flop; positive edge-trigger; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC374N ,74HC/HCT374; Octal D-type flip-flop; positive edge-trigger; 3-stateGENERAL DESCRIPTIONThe “374” is functionally identical to the “534”, but hasThe 74HC/HCT374 are hig ..
74HC374N.. ,74HC/HCT374; Octal D-type flip-flop; positive edge-trigger; 3-stateGENERAL DESCRIPTIONThe “374” is functionally identical to the “534”, but hasThe 74HC/HCT374 are hig ..
74AHC595PW-74AHCT595PW
8-bit serial-in/serial or parallel-out shift register with output latches; 3-state
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
FEATURES ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000V EIA/JESD22-A115-A exceeds 200V
CDM EIA/JESD22-C101 exceeds 1000V Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Specified from −40to +85 °C and from−40to +125 °C.
APPLICATIONS Serial-to-parallel data conversion Remote control holding register.
DESCRIPTIONThe 74AHC/AHCT595 are high-speed Si-gate CMOS
devices and are pin compatible with Low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT595 is an 8-stage serial shift register
with a storage register and 3-state outputs. The shift
register has separate clocks.
Data is shifted on the positive-going transitions of the
SHCP input. The datain each registeris transferredto the
storage registerona positive-going transitionof the STCP
input. If both clocks are connected together, the shift
register will always be one clock pulse ahead of the
storage register.
The shift register has a serial input (DS) and a serial
standard output (Q7’)for cascading.Itis also provided with
asynchronous reset (active LOW) for all 8 shift register
stages. The storage register has 8 parallel 3-state bus
driver outputs. Datain the storage register appearsat the
output whenever the output enable input (OE) is LOW.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 3.0 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi+∑ (CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz; (CL× VCC2×fo)= sum of outputs;= output load capacitance in pF;
VCC= supply voltage in Volts. The condition is VI= GNDto VCC. All 9 outputs switching.
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
FUNCTION TABLESee note1.
Note H= HIGH voltage level;= LOW voltage level;= LOW-to-HIGH transition;= HIGH-to-LOW transition;= don’t care;= no change;= high impedance OFF-state.
ORDERING INFORMATION
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
PINNING
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUES accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referencedto GND (ground=0 V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
CHARACTERISTICS
74AHC familyOver recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
74AHCT familyOver recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state 74AHC595; 74AHCT595
CHARACTERISTICS
Type 74AHC595GND=0 V; tr =tf≤ 3.0 ns.
