74AHC32PW ,Quad 2-input OR gate74AHC32; 74AHCT32Quad 2-input OR gateRev. 04 — 22 May 2008 Product data sheet1.
74AHC32PW ,Quad 2-input OR gateINTEGRATED CIRCUITSDATA SHEET74AHC32; 74AHCT32Quad 2-input OR gateProduct specification 1999 Sep 27S ..
74AHC373 ,3-state
74AHC373D ,Octal D-type transparent latch; 3-stateFeaturesn Balanced propagation delaysn All inputs have a Schmitt-trigger actionn Common 3-state out ..
74AHC373PW ,Octal D-type transparent latch; 3-state
74AHC373PW ,Octal D-type transparent latch; 3-state
74HC373D ,74HC/HCT373; Octal D-type transparent latch; 3-stateLogic diagram (one latch) D0 D1 D2 D3 D4 D5 D6 D7D Q D Q D Q D Q D Q D Q D Q D QLATCH LATCH LATCH L ..
74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateapplications. A latch enable (LE)QUICK REFERENCE DATAGND = 0 V; T =25 °C; t =t = 6 nsamb r fTYPICAL ..
74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateFEATURES input and an output enable (OE) input are common to alllatches.• 3-state non-inverting out ..
74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateLogic diagram (one latch) D0 D1 D2 D3 D4 D5 D6 D7D Q D Q D Q D Q D Q D Q D Q D QLATCH LATCH LATCH L ..
74HC373N ,Octal D-type transparent latch; 3-stateGeneral descriptionThe 74HC373; 74HCT373 is a high-speed Si-gate CMOS device and is pin compatible ..
74HC373PW ,74HC/HCT373; Octal D-type transparent latch; 3-stateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74AHC32PW-74AHCT32D-74AHCT32PW
Quad 2-input OR gate
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
FEATURES ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000V EIA/JESD22-A115-A
exceeds 200V
CDM EIA/JESD22-C101
exceeds 1000V Balanced propagation delays All inputs have Schmitt-trigger
actions Inputs acceptsvoltageshigher than
VCC For AHC only:
operates with CMOS input levels For AHCT only:
operates with TTL input levels Specified from
−40to +85 and +125 °C.
DESCRIPTIONThe 74AHC/AHCT32 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
No. 7A.
The 74AHC/AHCT32 provides the
2-input OR function.
FUNCTION TABLESee note1.
Note H= HIGH voltage level= LOW voltage level.
QUICK REFERENCE DATAGND=0 V; Tamb =25 °C; tr =tf≤ 3.0 ns.
Notes CPD is used to determine the dynamic power dissipation (PDin μW). =CPD× VCC2×fi+∑ (CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz; (CL× VCC2×fo)= sum of outputs;= output load capacitance in pF;
VCC= supply voltage in Volts. The condition is VI= GNDto VCC.
PINNING
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
ORDERING INFORMATION
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
RECOMMENDED OPERATING CONDITIONS
LIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground=0V).
Notes The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
DC CHARACTERISTICS
74AHC familyOver recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
74AHCT familyOver recommended operating conditions; voltages are referenced to GND (ground=0V).
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
AC CHARACTERISTICS
Type 74AHC32GND=0 V; tr =tf≤ 3.0 ns.
Notes Typical values at VCC= 3.3V. Typical values at VCC= 5.0V.
Type 74AHCT32GND=0 V; tr =tf≤ 3.0 ns.
Note Typical values at VCC= 5.0V.
Philips Semiconductors Product specification
Quad 2-input OR gate 74AHC32; 74AHCT32
AC WAVEFORMS
