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74AHC2G126DP-74AHCT2G126DP
Dual buffer/line driver; 3-state
1. General descriptionThe 74AHC2G126 and 74AHCT2G126 are high-speed Si-gate CMOS devices. They
provide a dual non-inverting buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input (nOE). A LOW at nOE causes the output to assume
a high-impedance OFF-state.
The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V.
The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.
2. Features and benefits Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Multiple package options ESD protection: HBM JESD22-A114E: exceeds 2000V MM JESD22-A115-A: exceeds 200 V CDM JESD22-C101C: exceeds 1000V Specified from 40 Cto +125 C
3. Ordering information
74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
Rev. 7 — 6 May 2013 Product data sheet
Table 1. Ordering information74AHC2G126DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm; lead length 0.5 mm
SOT505-2
74AHCT2G126DP
74AHC2G126DC 40 C to +125 C VSSOP8 plastic very thin shrink small outline package; leads; body width 2.3 mm
SOT765-1
74AHCT2G126DC
74AHC2G126GD 40 C to +125 C XSON8 plastic extremely thin small outline package; no
leads; 8 terminals; body 3 2 0.5 mm
SOT996-2
74AHCT2G126GD
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
4. Marking[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
6. Pinning information
6.1 Pinning
Table 2. Marking codes74AHC2G126DP A26
74AHCT2G126DP C26
74AHC2G126DC A26
74AHCT2G126DC C26
74AHC2G126GD A26
74AHCT2G126GD C26
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
6.2 Pin description
7. Functional description[1] H= HIGH voltage level; L= LOW voltage level; X= don’t care; Z= high-impedance OFF-state.
8. Limiting values[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For TSSOP8 package: above 55 C the value of Ptot derates linearly with 2.5 mW/K.
For VSSOP8 package: above 110 C the value of Ptot derates linearly with 8 mW/K.
For XSON8 package: above 118 C the value of Ptot derates linearly with 7.8 mW/K.
Table 3. Pin description1OE, 2OE 1, 7 output enable input (active HIGH)
1A, 2A 2, 5 data input
GND 4 ground (0 V), 2Y 6, 3 data output
VCC 8 supply voltage
Table 4. Function table[1] L
HHH Z
Table 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 0.5 +7.0 V input voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V [1] 20 - mA
IOK output clamping current VO < 0.5 V or VO >VCC +0.5V [1]- 20 mA output current 0.5 V < VO
ICC supply current - 75 mA
IGND ground current 75 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40Cto +125 C [2]- 250 mW
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
9. Recommended operating conditions
10. Static characteristics
Table 6. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V input voltage 0 - 5.5 0 - 5.5 V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature 40 +25 +125 40 +25 +125 C
t/V input transition rise
and fall rate
VCC = 3.3 V 0.3 V - - 100 - - - ns/V
VCC = 5.0 V 0.5 V - - 20 - - 20 ns/V
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
74AHC2G126
VIH HIGH-level
input voltage
VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85- - 3.85 - 3.85 - V
VIL LOW-level
input voltage
VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65- 1.65 - 1.65 V
VOH HIGH-level
output voltage = VIH or VIL = 50 A; VCC= 2.0 V 1.9 2.0 - 1.9 - 1.9 - V = 50 A; VCC= 3.0 V 2.9 3.0 - 2.9 - 2.9 - V = 50 A; VCC= 4.5 V 4.4 4.5 - 4.4 - 4.4 - V = 4.0 mA; VCC= 3.0 V 2.58- - 2.48 - 2.40 - V = 8.0 mA; VCC= 4.5 V 3.94- - 3.8 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL = 50 A; VCC= 2.0 V - 0 0.1 - 0.1 - 0.1 V = 50 A; VCC= 3.0 V - 0 0.1 - 0.1 - 0.1 V = 50 A; VCC= 4.5 V - 0 0.1 - 0.1 - 0.1 V = 4.0 mA; VCC= 3.0 V - - 0.36- 0.44 - 0.55 V = 8.0 mA; VCC= 4.5 V - - 0.36- 0.44 - 0.55 V
IOZ OFF-state
output current =VCC or GND;
VCC =5.5V - 0.25- 2.5 - 10 A input leakage
current= 5.5Vor GND;
VCC =0 Vto 5.5V - 0.1 - 1.0 - 2.0 A
ICC supply currentVI =VCCor GND; IO = 0 A;
VCC= 5.5 V - 1.0 - 10 - 40 A
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
11. Dynamic characteristics input
capacitance 1.5 10 - 10 - 10 pF
74AHCT2G126
VIH HIGH-level
input voltage
VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage = VIH or VIL; VCC= 4.5 V = 50A 4.4 4.5 - 4.4 - 4.4 - V = 8.0 mA 3.94- - 3.8 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL; VCC= 4.5 V = 50A - 0 0.1 - 0.1 - 0.1 V = 8.0 mA - - 0.36- 0.44 - 0.55 V
IOZ OFF-state
output current =VCC or GND;
VCC =5.5V - 0.25- 2.5 - 10 A input leakage
current= 5.5Vor GND;
VCC =0 Vto 5.5V - 0.1 - 1.0 - 2.0 A
ICC supply currentVI =VCCor GND; IO = 0 A;
VCC= 5.5 V - 1.0 - 10 - 40 A
ICC additional
supply current
per input pin; VI =3.4V;
other inputs at VCCor GND; =0 A; VCC = 5.5 V - 1.35- 1.5 - 1.5 mA input
capacitance 1.5 10 - 10 - 10 pF
Table 7. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Figure8.
74AHC2G126
tpd propagation
delayto nY; see Figure6 [1]
VCC = 3.0 V to 3.6 V [2]=15pF - 4.7 8.0 1.0 9.5 1.0 11.5 ns=50pF - 6.6 11.5 1.0 13.0 1.0 14.5 ns
VCC = 4.5 V to 5.5 V [3]=15pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns=50pF - 4.8 7.5 1.0 8.5 1.0 9.5 ns
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
ten enable time nOEto nY; see Figure7 [1]
VCC = 3.0 V to 3.6 V [2]=15pF - 5.0 8.0 1.0 9.5 1.0 11.5 ns=50pF - 6.9 11.5 1.0 13.0 1.0 14.5 ns
VCC = 4.5 V to 5.5 V [3]=15pF - 3.6 5.1 1.0 6.0 1.0 6.5 ns=50pF - 4.9 7.5 1.0 9.0 1.0 9.5 ns
tdis disable time nOEto nY; see Figure7 [1]
VCC = 3.0 V to 3.6 V [2]=15pF - 6.0 9.7 1.0 11.5 1.0 12.5 ns=50pF - 8.3 13.2 1.0 15.0 1.0 16.5 ns
VCC = 4.5 V to 5.5 V [3]=15pF - 4.1 6.8 1.0 8.0 1.0 8.5 ns=50pF - 5.7 8.8 1.0 10.0 1.0 11.0 ns
CPD power
dissipation
capacitance
per buffer; =50pF;fi =1 MHz; =GNDto VCC
[4] -10- - - - - pF
74AHCT2G126
tpd propagation
delayto nY; see Figure6 [1]
VCC = 4.5 V to 5.5 V [3]=15pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns=50pF - 4.8 7.5 1.0 8.5 1.0 9.5 ns
ten enable time nOEto nY; see Figure7 [1]
VCC = 4.5 V to 5.5 V [3]=15pF - 3.9 5.1 1.0 6.0 1.0 6.5 ns=50pF - 5.1 7.5 1.0 9.0 1.0 9.5 ns
tdis disable time nOEto nY; see Figure7 [1]
VCC = 4.5 V to 5.5 V [3]=15pF - 4.5 6.8 1.0 8.0 1.0 8.5 ns=50pF - 6.1 8.8 1.0 10.0 1.0 11.0 ns
Table 8. Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure8.
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
[1] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
[2] Typical values are measured at VCC = 3.3 V.
[3] Typical values are measured at VCC = 5.0 V.
[4] CPD is used to determine the dynamic power dissipation PD (W). =CPD VCC2fi+(CL VCC2 fo)where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts.
12. Waveforms
CPD power
dissipation
capacitance
per buffer; =50pF;fi =1 MHz; =GNDto VCC
[4] -10- - - - - pF
Table 8. Dynamic characteristics …continued
GND = 0 V; for test circuit see Figure8.
NXP Semiconductors 74AHC2G126; 74AHCT2G126
Dual buffer/line driver; 3-state
Table 9. Measurement points
74AHC2G126 0.5VCC 0.5VCC VOL +0.3V VOH 0.3V
74AHCT2G126 1.5 V 0.5VCC VOL +0.3V VOH 0.3V