74AHC257PW Fast Delivery |IC PHOENIX CO.,LIMITED

74AHC257PW ,Quad 2-input multiplexer; 3-stateFeaturesn Balanced propagation delaysn All inputs have Schmitt-trigger actionsn Non-inverting data ..
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74AHC2G00DP ,74AHC2G00; 74AHCT2G00; 2-input NAND gateINTEGRATED CIRCUITSDATA SHEET74AHC2G00; 74AHCT2G002-input NAND gateProduct speciﬁcation 2004 Jan 21 ..
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74HC373D ,74HC/HCT373; Octal D-type transparent latch; 3-stateLogic diagram (one latch) D0 D1 D2 D3 D4 D5 D6 D7D Q D Q D Q D Q D Q D Q D Q D QLATCH LATCH LATCH L ..
74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateapplications. A latch enable (LE)QUICK REFERENCE DATAGND = 0 V; T =25 °C; t =t = 6 nsamb r fTYPICAL ..
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74HC373DB ,74HC/HCT373; Octal D-type transparent latch; 3-stateLogic diagram (one latch) D0 D1 D2 D3 D4 D5 D6 D7D Q D Q D Q D Q D Q D Q D Q D QLATCH LATCH LATCH L ..
74HC373N ,Octal D-type transparent latch; 3-stateGeneral descriptionThe 74HC373; 74HCT373 is a high-speed Si-gate CMOS device and is pin compatible ..

74AHC257PW
Quad 2-input multiplexer; 3-state
General descriptionThe 74AHC257; 74AHCT257isa high-speed Si-gate CMOS device andis pin compatible
with Low-power Schottky TTL (LSTTL).Itis speciﬁedin compliance with JEDEC standard
No. 7-A.
The 74AHC257; 74AHCT257 has four identical 2-input multiplexers with 3-state outputs,
which select 4 bits of data from two sources and are controlled by a common data select
input (S). The data inputs from source0 (1I0to 4I0) are selected when inputSis LOW and
the data inputs from source 1 (1I1 to 4I1) are selected when input S is HIGH. Data
appears at the outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74AHC257; 74AHCT257 is the logic implementation of a 4-pole 2-position switch,
where the position of the switch is determined by the logic levels applied to input S. The
outputs are forced to a high-impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
1Y = OE× (1I1× S + 1I0×S)
2Y = OE× (2I1× S + 2I0×S)
3Y = OE× (3I1× S + 3I0×S)
4Y = OE× (4I1× S + 4I0×S)
The 74AHC257; 74AHCT257 is identical to the 74AHC258; 74AHCT258, but has
non-inverting (true) outputs. Features Balanced propagation delays All inputs have Schmitt-trigger actions Non-inverting data path Inputs accept voltages higher than VCC Input levels: For 74AHC257: CMOS level For 74AHCT257: TTL level ESD protection: HBM EIA/JESD22-A114E exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V CDM EIA/JESD22-C101C exceeds 1000V Multiple package options Speciﬁed from −40 °C to +85 °C and from −40 °C to +125°C
74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
Rev. 02 — 9 May 2008 Product data sheet
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state Ordering information Functional diagram
Table 1. Ordering information
74AHC257
74AHC257D −40 °C to +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74AHC257PW −40 °C to +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74AHCT257
74AHCT257D −40 °C to +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74AHCT257PW −40 °C to +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin description 1 common data select input
1I0 2 data input from source0
1I1 3 data input from source1 4 multiplexer output
2I0 5 data input from source0
2I1 6 data input from source1 7 multiplexer output
GND 8 ground (0V) 9 multiplexer output
3I1 10 data input from source1
3I0 11 data input from source0 12 multiplexer output
4I1 13 data input from source1
4I0 14 data input from source0 15 output enable input (active LOW)
VCC 16 supply voltage
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state Functional description
[1]H= HIGH voltage level;= LOW voltage level;= don’t care;= high-impedance OFF-state. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
Table 3. Function table[1] X X Z X L L H X L H
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +7.0 V input voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5V [1] −20 - mA
IOK output clamping current VO < −0.5 V orVO >VCC+ 0.5V [1] −20 +20 mA output current VO = −0.5 V to (VCC + 0.5V) −25 +25 mA
ICC supply current - +75 mA
IGND ground current −75 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C [2]- 500 mW
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state Recommended operating conditions Static characteristics
Table 5. Operating conditions
74AHC257
VCC supply voltage 2.0 5.0 5.5 V input voltage 0 - 5.5 V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 3.0 V to 3.6V - - 100 ns/V
VCC = 4.5 V to 5.5V - - 20 ns/V
74AHCT257
VCC supply voltage 4.5 5.0 5.5 V input voltage 0 - 5.5 V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 4.5 V to 5.5V - - 20 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0V).
74AHC257
VIH HIGH-level
input voltage
VCC = 2.0V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage
VCC = 2.0V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5V - - 1.65 - 1.65 - 1.65 V
VOH HIGH-level
output voltage = VIH or VIL= −50 μA; VCC= 2.0V 1.9 2.0 - 1.9 - 1.9 - V= −50 μA; VCC= 3.0V 2.9 3.0 - 2.9 - 2.9 - V= −50 μA; VCC= 4.5V 4.4 4.5 - 4.4 - 4.4 - V= −4.0 mA; VCC= 3.0V 2.58 - - 2.48 - 2.40 - V= −8.0 mA; VCC= 4.5V 3.94 - - 3.80 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL = 50 μA; VCC= 2.0V - 0 0.1 - 0.1 - 0.1 V = 50 μA; VCC= 3.0V - 0 0.1 - 0.1 - 0.1 V = 50 μA; VCC= 4.5V - 0 0.1 - 0.1 - 0.1 V = 4.0 mA; VCC= 3.0V - - 0.36 - 0.44 - 0.55 V = 8.0 mA; VCC= 4.5V - - 0.36 - 0.44 - 0.55 V
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state input leakage
current= 5.5Vor GND;
VCC =0Vto5.5V - 0.1 - 1.0 - 2.0 μA
IOZ OFF-state
output current =VIHor VIL; =VCCor GND;
VCC= 5.5V ±0.25 - ±2.5 - ±10.0 μA
ICC supply currentVI =VCCor GND; IO = 0A;
VCC= 5.5V - 4.0 - 40 - 80 μA input
capacitance =VCCor GND - 3 10 - 10 - 10 pF output
capacitance - - - - - pF
74AHCT257
VIH HIGH-level
input voltage
VCC = 4.5 V to 5.5V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC = 4.5 V to 5.5V - - 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage = VIH or VIL; VCC= 4.5V= −50μA 4.4 4.5 - 4.4 - 4.4 - V= −8.0 mA 3.94 - - 3.80 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL; VCC= 4.5V = 50μA - 0 0.1 - 0.1 - 0.1 V = 8.0 mA - - 0.36 - 0.44 - 0.55 V input leakage
current= 5.5Vor GND;
VCC =0Vto5.5V - 0.1 - 1.0 - 2.0 μA
IOZ OFF-state
output current =VIHor VIL; =VCCor GND per input
pin; other inputs at
VCCor GND; IO =0A;
VCC= 5.5V ±0.25 - ±2.5 - ±10.0 μA
ICC supply currentVI =VCCor GND; IO = 0A;
VCC= 5.5V - 4.0 - 40 - 80 μA
ΔICC additional
supply current
per input pin; =VCC− 2.1V;
other pinsat VCC or GND;=0 A; VCC= 4.5Vto 5.5V - 1.35 - 1.5 - 1.5 mA input
capacitance =VCCor GND - 3 10 - 10 - 10 pF output
capacitance - - - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0V).
NXP Semiconductors 74AHC257; 74AHCT257
Quad 2-input multiplexer; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure8.
74AHC257
tpd propagation
delay
nI0, nI1to nY; see Figure6 [2]
VCC = 3.0 V to 3.6V=15pF - 4.2 9.3 1.0 11.0 1.0 12.0 ns=50pF - 6.0 12.8 1.0 14.5 1.0 16.0 ns
VCC = 4.5 V to 5.5V=15pF - 2.9 5.9 1.0 7.0 1.0 7.5 ns=50pF - 4.2 7.9 1.0 9.0 1.0 11.5 nsto nY; see Figure6 [2]
VCC = 3.0 V to 3.6V=15pF - 5.2 11.0 1.0 13.0 1.0 14.0 ns=50pF - 7.4 14.5 1.0 16.5 1.0 18.5 ns
VCC = 4.5 V to 5.5V=15pF - 3.5 6.8 1.0 8.0 1.0 8.5 ns=50pF - 5.0 8.8 1.0 10.0 1.0 12.5 ns
ten enable time OEto nY; see Figure7 [3]
VCC = 3.0 V to 3.6V=15pF - 4.5 10.5 1.0 12.5 1.0 13.5 ns=50pF - 6.4 14.0 1.0 16.0 1.0 17.5 ns
VCC = 4.5 V to 5.5V=15pF - 3.2 6.8 1.0 8.0 1.0 8.5 ns=50pF - 4.5 8.8 1.0 10.0 1.0 12.5 ns
tdis disable time OEto nY; see Figure7 [4]
VCC = 3.0 V to 3.6V=15pF - 5.1 9.5 1.0 11.0 1.0 11.5 ns=50pF - 7.2 12.0 1.0 13.5 1.0 14.5 ns
VCC = 4.5 V to 5.5V=15pF - 3.4 6.5 1.0 7.0 1.0 8.5 ns=50pF - 4.9 7.9 1.0 9.0 1.0 9.5 ns
CPD power
dissipation
capacitance=1 MHz;VI= GNDto VCC [5]
4 outputs switching via
input S
-45 - - - - - pF
1 output switching via
input I
-15 - - - - - pF

Partno	Mfg	Dc	Qty	Available	Descript
74AHC257PW	NXP	N/a	2500	avai	Quad 2-input multiplexer; 3-state