74AHC245D Fast Delivery |IC PHOENIX CO.,LIMITED

74AHC245D ,Octal bus transceiver; 3-stateGeneral descriptionThe 74AHC245; 74AHCT245 is a high-speed Si-gate CMOS device.The 74AHC245; 74AHCT ..
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74AHC245D
Octal bus transceiver; 3-state
General descriptionThe 74AHC245; 74AHCT245 is a high-speed Si-gate CMOS device.
The 74AHC245; 74AHCT245 is an octal transceiver featuring non-inverting 3-state bus
compatible outputs in both send and receive directions.
The 74AHC245; 74AHCT245 features an output enable input (OE), for easy cascading,
and a send and receive direction control input (DIR).
OE controls the outputs so that the buses are effectively isolated. Features Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Input levels: For 74AHC245: CMOS level For 74AHCT245: TTL level ESD protection: HBM EIA/JESD22-A114E exceeds 2000V MM EIA/JESD22-A115-A exceeds 200V CDM EIA/JESD22-C101C exceeds 1000V Multiple package options Speciﬁed from −40 °C to +85 °C and from −40 °C to +125°C Ordering information
74AHC245; 74AHCT245
Octal bus transceiver; 3-state
Rev. 05 — 28 April 2009 Product data sheet
Table 1. Ordering information
74AHC245D −40°Cto +125°C SO20 plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
74AHCT245D
74AHC245PW −40°Cto +125°C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
74AHCT245PW
74AHC245BQ −40°Cto +125°C DHVQFN20 plastic dual in-line compatible thermal enhanced
very thin quadﬂat package;no leads;20 terminals;
body 2.5× 4.5× 0.85 mm
SOT764-1
74AHCT245BQ
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state Functional diagram
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin description
DIR 1 direction control input 2 data input/output 3 data input/output 4 data input/output 5 data input/output 6 data input/output 7 data input/output 8 data input/output 9 data input/output
GND 10 ground (0V) 11 data input/output 12 data input/output 13 data input/output 14 data input/output 15 data input/output 16 data input/output
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state Functional description
[1]H= HIGH voltage level;= LOW voltage level;
X = don’t care;= high-impedance OFF-state. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO20 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For TSSOP20 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN20 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K. 17 data input/output 18 data input/output 19 output enable input (active LOW)
VCC 20 supply voltage
Table 2. Pin description …continued
Table 3. Function table[1] L A=B inputs H inputs B=A Z Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +7.0 V input voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5V [1] −20 - mA
IOK output clamping current VO< −0.5 V orVO >VCC+ 0.5V [1] −20 +20 mA output current VO = −0.5 V to (VCC + 0.5V) −25 +25 mA
ICC supply current - +75 mA
IGND ground current −75 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C [2]- 500 mW
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state Recommended operating conditions Static characteristics
Table 5. Operating conditions
74AHC245
VCC supply voltage 2.0 5.0 5.5 V input voltage 0 - 5.5 V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 3.0 V to 3.6V - - 100 ns/V
VCC = 4.5 V to 5.5V - - 20 ns/V
74AHCT245
VCC supply voltage 4.5 5.0 5.5 V input voltage 0 - 5.5 V output voltage 0 - VCC V
Tamb ambient temperature −40 +25 +125 °C
Δt/ΔV input transition rise and fall rate VCC = 4.5 V to 5.5V - - 20 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0V).
74AHC245
VIH HIGH-level
input voltage
VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage
VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V
VOH HIGH-level
output voltage = VIH or VIL= −50 μA; VCC= 2.0 V 1.9 2.0 - 1.9 - 1.9 - V= −50 μA; VCC= 3.0 V 2.9 3.0 - 2.9 - 2.9 - V= −50 μA; VCC= 4.5 V 4.4 4.5 - 4.4 - 4.4 - V= −4.0 mA; VCC= 3.0 V 2.58 - - 2.48 - 2.40 - V= −8.0 mA; VCC= 4.5 V 3.94 - - 3.80 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL = 50 μA; VCC= 2.0 V - 0 0.1 - 0.1 - 0.1 V = 50 μA; VCC= 3.0 V - 0 0.1 - 0.1 - 0.1 V = 50 μA; VCC= 4.5 V - 0 0.1 - 0.1 - 0.1 V = 4.0 mA; VCC= 3.0 V - - 0.36 - 0.44 - 0.55 V = 8.0 mA; VCC= 4.5 V - - 0.36 - 0.44 - 0.55 V
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state input leakage
current= 5.5Vor GND;
VCC=0V to 5.5V - 0.1 - 1.0 - 2.0 μA
IOZ OFF-state
output current
VI =VIH or VIL; =VCCor GND;
VCC= 5.5V ±0.25 - ±2.5 - ±10.0 μA
ICC supply currentVI =VCCor GND; IO = 0 A;
VCC= 5.5V - 4.0 - 40 - 80 μA input
capacitance =VCCor GND - 3 10 - 10 - 10 pF output
capacitance - - - - - pF
74AHCT245
VIH HIGH-level
input voltage
VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage = VIH or VIL; VCC= 4.5 V= −50μA 4.4 4.5 - 4.4 - 4.4 - V= −8.0 mA 3.94 - - 3.80 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL; VCC= 4.5 V = 50μA - 0 0.1 - 0.1 - 0.1 V = 8.0 mA - - 0.36 - 0.44 - 0.55 V input leakage
current= 5.5Vor GND;
VCC=0V to 5.5V - 0.1 - 1.0 - 2.0 μA
IOZ OFF-state
output current =VIHor VIL; =VCCor GND per input
pin; other inputs at
VCCor GND; IO= 0 A;
VCC= 5.5V ±0.25 - ±2.5 - ±10.0 μA
ICC supply currentVI =VCCor GND; IO = 0 A;
VCC= 5.5V - 4.0 - 40 - 80 μA
ΔICC additional
supply current
per input pin; =VCC− 2.1V;
other pinsat VCC or GND;= 0 A; VCC= 4.5Vto 5.5V - 1.35 - 1.5 - 1.5 mA input
capacitance =VCCor GND - 3 10 - 10 - 10 pF output
capacitance - - - - - pF
Table 6. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0V).
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure7.
74AHC245
tpd propagation
delay
An to Bn; Bn to An;
see Figure5
[2]
VCC = 3.0 V to 3.6 V=15pF - 5.0 8.4 1.0 10.0 1.0 10.5 ns=50pF - 6.5 11.9 1.0 13.5 1.0 15.0 ns
VCC = 4.5 V to 5.5 V=15pF - 3.5 5.5 1.0 6.5 1.0 7.0 ns=50pF 5.0 7.5 1.0 8.5 1.0 9.5 ns
ten enable time OE to An; OE to Bn;
signal name DIR;
see Figure6
[3]
VCC = 3.0 V to 3.6 V=15pF - 6.5 13.2 1.0 15.5 1.0 16.5 ns=50pF - 9.0 16.7 1.0 19.0 1.0 21.0 ns
VCC = 4.5 V to 5.5 V=15pF - 4.0 8.5 1.0 10.0 1.0 11.0 ns=50pF - 5.0 10.6 1.0 12.0 1.0 13.5 ns
tdis disable time OE to An; OE to Bn;
signal name DIR;
see Figure6
[4]
VCC = 3.0 V to 3.6 V=15pF - 7.5 12.5 1.0 15.5 1.0 16.0 ns=50pF - 10.0 15.8 1.0 18.0 1.0 20.0 ns
VCC = 4.5 V to 5.5 V=15pF - 4.5 7.8 1.0 9.2 1.0 10.0 ns=50pF - 6.0 9.7 1.0 11.0 1.0 12.5 ns
CPD power
dissipation
capacitance
fi = 1 MHz;= GNDto VCC
[5] -12 - - - - - pF
74AHCT245; VCC = 4.5 V to 5.5 V
tpd propagation
delay
An to Bn; Bn to An;
see Figure5
[2]=15pF - 3.5 7.7 1.0 8.5 1.0 10.0 ns=50pF - 4.5 8.7 1.0 9.5 1.0 11.0 ns
ten enable time OE to An; OE to Bn;
signal name DIR;
see Figure6
[3]=15pF - 5.0 13.8 1.0 15.0 1.0 17.5 ns=50pF - 6.0 14.8 1.0 16.0 1.0 18.5 ns
NXP Semiconductors 74AHC245; 74AHCT245
Octal bus transceiver; 3-state
[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0V).
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZL and tPZH.
[4] tdis is the same as tPLZ and tPHZ.
[5] CPDis used to determine the dynamic power dissipation (PD in μW). =CPD× VCC2×fi× N+ Σ(CL× VCC2×fo) where: = input frequency in MHz;= output frequency in MHz;= output load capacitance inpF;
VCC= supply voltage in V;= number of inputs switching;
Σ(CL× VCC2×fo)= sum of the outputs.
10.1 Waveforms
tdis disable time OE to An; OE to Bn;
signal name DIR;
see Figure6
[4]=15pF - 5.0 14.4 1.0 15.5 1.0 18.0 ns=50pF - 6.0 15.4 1.0 16.5 1.0 19.5 ns
CPD power
dissipation
capacitance
fi = 1 MHz;= GNDto VCC
[5] -15 - - - - - pF
Table 7. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure7.

Partno	Mfg	Dc	Qty	Available	Descript
74AHC245D	NXP	N/a	2000	avai	Octal bus transceiver; 3-state