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74AHC157PW
Quad 2-input multiplexer
General descriptionThe 74AHC/AHCT157 are high-speed Si-gate CMOS devices and are pin compatible with
Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74AHC/AHCT157 are quad 2-input multiplexer which select 4 bits of data from two
sources under the control of a common data select input (S). The enable input (E) is
active LOW. When E is HIGH, all of the outputs (1Yto 4Y) are forced LOW regardless of
all other input conditions.
Moving the data from two groups of registers to four common output buses is a common
use of the 74AHC/AHCT157. The state of the common data select input (S) determines
the particular register from which the data comes. It can also be used as function
generator. The device is useful for implementing highly irregular logic by generating any
four of the 16 different functions of two variables with one variable common. The
74AHC/AHCT157 is logic implementation of a 4-pole, 2-position switch, where the
position of the switch is determine by the logic levels applied to S.
The logic equations are:= E × (1I1 × S+ 1I0 ×S)= E × (2I1 × S+ 2I0 ×S)= E × (3I1 × S+ 3I0 ×S)= E × (4I1 × S+ 4I0 ×S)
The 74AHC/AHCT157 is identical to the 74AHC/AHCT158 but has non-inverting (true)
outputs.
Features Balanced propagation delays All inputs have a Schmitt-trigger action Inputs accepts voltages higher than VCC Multiple input enable for easy expansion Ideal for memory chip select decoding For 74AHC157 only: operates with CMOS input levels For 74AHCT157 only: operates with TTL input levels ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V CDM JESD22-C101C exceeds 1000V
74AHC157; 74AHCT157
Quad 2-input multiplexer
Rev. 02 — 9 November 2007 Product data sheet
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer Multiple package options Specified from −40 °C to +85 °C and from −40 °C to +125°C
Ordering information Functional diagram
Table 1. Ordering information74AHC157D −40°Cto +125°C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74AHCT157D
74AHC157PW −40°Cto +125°C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74AHCT157PW
74AHC157BQ −40°Cto +125°C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quadflat package;no leads;16 terminals;
body 2.5× 3.5× 0.85 mm
SOT763-1
74AHCT157BQ
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer Pinning information
5.1 Pinning
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer
5.2 Pin description Functional description[1]H= HIGH voltage level;= LOW voltage level;= don’t care.
Table 2. Pin description 1 common data select input
1I0 to 4I0 2, 5, 11, 14 data inputs from source 0
1I1 to 4I1 3, 6, 10, 13 data inputs from source 1
1Y to 4Y 4, 7, 9, 12 multiplexer outputs
GND 8 ground (0V) 15 enable input (active LOW)
VCC 16 supply voltage
Table 3. Function table[1] XXXL
LLLX L
LLH X H X L L X H H
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer Limiting values[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70°C.
[3] Ptot derates linearly with 5.5 mW/K above 60°C.
[4] Ptot derates linearly with 4.5 mW/K above 60°C.
Recommended operating conditions
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0V).
VCC supply voltage −0.5 +7.0 V input voltage −0.5 +7.0 V
IIK input clamping current VI < −0.5V [1] −20 - mA
IOK output clamping current VO< −0.5 V orVO >VCC+ 0.5V [1]- ±20 mA output current VO = −0.5 V to (VCC+ 0.5V) - ±25 mA
ICC supply current - 75 mA
IGND ground current −75 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C
SO16 package [2]- 500 mW
TSSOP16 package [3]- 500 mW
DHVQFN16 package [4]- 500 mW
Table 5. Recommended operating conditionsVoltages are referenced to GND (ground = 0 V).
VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V input voltage 0 - 5.5 0 - 5.5 V output voltage 0 - VCC 0- VCC V
Tamb ambient temperature −40 +25 +125 −40 +25 +125 °C
Δt/ΔV input transition rise
and fall rate
VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V
VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer Static characteristics
Table 6. Static characteristicsVoltages are referenced to GND (ground = 0 V).
For type 74AHC157VIH HIGH-level
input voltage
VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V
VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V
VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V
VIL LOW-level
input voltage
VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V
VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V
VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V
VOH HIGH-level
output voltage = VIH or VIL= −50 μA; VCC= 2.0 V 1.9 2.0 - 1.9 - 1.9 - V= −50 μA; VCC= 3.0 V 2.9 3.0 - 2.9 - 2.9 - V= −50 μA; VCC= 4.5 V 4.4 4.5 - 4.4 - 4.4 - V= −4.0 mA; VCC= 3.0 V 2.58 - - 2.48 - 2.40 - V= −8.0 mA; VCC= 4.5 V 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL = 50 μA; VCC= 2.0 V - 0 0.1 - 0.1 - 0.1 V = 50 μA; VCC= 3.0 V - 0 0.1 - 0.1 - 0.1 V = 50 μA; VCC= 4.5 V - 0 0.1 - 0.1 - 0.1 V = 4.0 mA; VCC= 3.0 V - - 0.36 - 0.44 - 0.55 V = 8.0 mA; VCC= 4.5 V - - 0.36 - 0.44 - 0.55 V input leakage
current= 5.5Vor GND;
VCC =0Vto5.5V - 0.1 - 1.0 - 2.0 μA
ICC supply currentVI =VCCor GND; IO = 0 A;
VCC= 5.5V - 4.0 - 40 - 80 μA input
capacitance 3.0 10 - 10 - 10 pF output
capacitance 4.0 - - - - - pF
For type 74AHCT157VIH HIGH-level
input voltage
VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V
VIL LOW-level
input voltage
VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V
VOH HIGH-level
output voltage = VIH or VIL; VCC= 4.5 V= −50μA 4.4 4.5 - 4.4 - 4.4 - V= −8.0 mA 3.94 - - 3.8 - 3.70 - V
VOL LOW-level
output voltage = VIH or VIL; VCC= 4.5 V = 50μA - 0 0.1 - 0.1 - 0.1 V = 8.0 mA - - 0.36 - 0.44 - 0.55 V
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer
10. Dynamic characteristics input leakage
current= 5.5Vor GND;
VCC =0Vto5.5V - 0.1 - 1.0 - 2.0 μA
ICC supply currentVI =VCCor GND; IO = 0 A;
VCC= 5.5V - 4.0 - 40 - 80 μA
ΔICC additional
supply current
per input pin; =VCC− 2.1 V; IO= 0 A;
other pinsat VCC or GND;
VCC= 4.5Vto 5.5V - 1.35 - 1.5 - 1.5 mA input
capacitance 3 10 - 10 - 10 pF output
capacitance 4.0 - - - - - pF
Table 6. Static characteristics …continuedVoltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristicsGND = 0 V; For test circuit see Figure9.
For type 74AHC157tpd propagation
delay
nI0, nI1to nY; see Figure7 [2]
VCC = 3.0 V to 3.6 V=15pF - 4.4 9.7 1.0 11.5 1.0 12.5 ns=50pF - 6.3 13.2 1.0 15.0 1.0 16.5 ns
VCC = 4.5 V to 5.5 V=15pF - 3.2 6.4 1.0 7.5 1.0 8.0 ns=50pF - 4.6 8.4 1.0 9.5 1.0 10.5 ns
S to nY; see Figure7 [2]
VCC = 3.0 V to 3.6 V=15pF - 4.8 13.6 1.0 16.0 1.0 17.0 ns=50pF - 6.8 17.1 1.0 19.5 1.0 21.5 ns
VCC = 4.5 V to 5.5 V=15pF - 3.6 8.6 1.0 10.0 1.0 11.0 ns=50pF - 5.2 10.6 1.0 12.0 1.0 13.5 nsto nY; see Figure8 [2]
VCC = 3.0 V to 3.6 V=15pF - 5.9 13.2 1.0 15.5 1.0 16.5 ns=50pF - 8.4 16.7 1.0 19.0 1.0 21.0 ns
VCC = 4.5 V to 5.5 V=15pF - 4.2 8.1 1.0 9.5 1.0 10.5 ns=50pF - 6.0 10.1 1.0 11.5 1.0 13.0 ns
NXP Semiconductors 74AHC157; 74AHCT157
Quad 2-input multiplexer[1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0V).
[2] tpd is the same as tPLH and tPHL.
[3] CPD is used to determine the dynamic power dissipation PD (μW). =CPD× VCC2×fi+∑(CL× VCC2×fo) where:= input frequency in MHz;= output frequency in MHz;= output load capacitance in pF;
VCC= supply voltage in Volts.
CPD power
dissipation
capacitance=50 pF; fi = 1 MHz;= GNDto VCC
[3]
4 outputs switching via S - 31 - - - - - pF
1 outputs switching via I - 13 - - - - - pF
For type 74AHCT157tpd propagation
delay
nI0, nI1to nY; see Figure7 [2]
VCC = 4.5 V to 5.5 V=15pF - 3.2 6.4 1.0 7.5 1.0 8.0 ns=50pF - 4.6 8.7 1.0 9.8 1.0 11.0 ns
S to nY; see Figure7
VCC = 4.5 V to 5.5 V=15pF - 3.7 8.6 1.0 10.0 1.0 11.0 ns=50pF - 5.2 10.4 1.0 12.0 1.0 13.0 nsto nY; see Figure8 [2]
VCC = 4.5 V to 5.5 V=15pF - 4.7 8.1 1.0 9.5 1.0 10.5 ns=50pF - 6.7 10.6 1.0 12.0 1.0 13.5 ns
CPD power
dissipation
capacitance=50 pF; fi = 1 MHz;= GNDto VCC
[3]
4 outputs switching via S - 41 - - - - - pF
1 outputs switching via I - 16 - - - - - pF
Table 7. Dynamic characteristics …continuedGND = 0 V; For test circuit see Figure9.