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74ACTQ646FAIN/a1150avaiOctal Transceiver/Register with 3-STATE Outputs


74ACTQ646 ,Octal Transceiver/Register with 3-STATE Outputs74ACQ646 • 74ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE OutputsJanuary 1990Revis ..
74ACTQ646SCX ,Quiet Series Octal Transceiver/Register with 3-STATE Outputs74ACQ646 • 74ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE OutputsJanuary 1990Revis ..
74ACTQ646SCX ,Quiet Series Octal Transceiver/Register with 3-STATE Outputs74ACQ646 • 74ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE OutputsJanuary 1990Revis ..
74ACTQ652SC ,Quiet Series Transceiver/Register74ACTQ652 Quiet Series Transceiver/RegisterJune 1991Revised September 200074ACTQ652Quiet Series T ..
74ACTQ652SCX ,Quiet Series Transceiver/RegisterFeaturesThe ACTQ652 consists of bus transceiver circuits with D-

74ACTQ646
Octal Transceiver/Register with 3-STATE Outputs
74ACQ646 • 74ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE Outputs January 1990 Revised September 2000 74ACQ646  74ACTQ646 Quiet Series Octal Transceiver/Register with 3-STATE Outputs General Description Features The ACQ/ACTQ646 consist of registered bus transceiverGuaranteed simultaneous switching noise level and circuits, with outputs, D-type flip-flops, and control circuitry dynamic threshold performance providing multiplexed transmission of data directly from theGuaranteed pin-to-pin skew AC performance input bus or from the internal storage registers. Data on the Independent registers for A and B busses A or B bus will be loaded into the respective registers on Multiplexed real-time and stored data transfers the LOW-to-HIGH transition of the appropriate clock pin (CPAB or CPBA). The four fundamental handling functions300 mil slim dual-in-line package available are illustrated in Figure 1, Figure 2, Figure 3 andOutputs source/sink 24 mA Figure 4. Faster prop delays than the standard AC/ACT646 The ACQ/ACTQ utilizes Fairchild Quiet Series technol- ogy to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series fea- tures GTO output control and undershoot corrector in addition to a split ground bus for superior performance. Ordering Code: Order Number Package Number Package Description 74ACQ646SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ACQ464ASPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 74ACTQ646SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ACTQ464ASPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names Descriptions A –A Data Register A Inputs 0 7 Data Register A Outputs B –B Data Register B Inputs 0 7 Data Register B Outputs CPAB, CPBA Clock Pulse Inputs SAB, SBA Transmit/Receive Inputs G Output Enable Input DIR Direction Control Input FACT, Quiet Series, FACT Quiet Series and GTO are trademarks of © 2000 DS010635
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