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74ACTQ14FAIRCHILDN/a20avaiQuiet Series Hex Inverter with Schmitt Trigger Input


74ACTQ14 ,Quiet Series Hex Inverter with Schmitt Trigger InputfeaturesGTO output control and undershoot corrector in additionto a split ground bus for superior ..
74ACTQ14MTCX ,Quiet Series Hex Inverter with Schmitt Trigger InputElectrical CharacteristicsV T

74ACTQ14
Quiet Series Hex Inverter with Schmitt Trigger Input
74ACTQ14 Quiet Series Hex Inverter with Schmitt Trigger Input March 1991 Revised November 1999 74ACTQ14 Quiet Series Hex Inverter with Schmitt Trigger Input General Description Features The ACTQ14 contains six inverter gates each with aI reduced by 50% CC Schmitt trigger input. They are capable of transforming Guaranteed simultaneous switching noise level and slowly changing input signals into sharply defined, jitter- dynamic threshold performance free output signals. In addition, they have a greater noise Improved latch-up immunity margin than conventional inverters. Guaranteed pin-to-pin skew AC performance The ACTQ14 utilizes Fairchild Quiet Series Technology Outputs source/sink 24 mA to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance. The ACTQ14 has hysteresis between the positive-going and negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essen- tially insensitive to temperature and supply voltage varia- tions. Ordering Code: Order Number Package Number Package Description 74ACTQ14SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body 74ACTQ14MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACTQ14PC N14A 14-Lead Plastic Dual-In-Lead Package (PDIP), JEDEC MS-001, 0.300” Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Function Table Pin Descriptions Input Output Pin Names Description AO I Inputs n LH O Outputs n HL Quiet Series, FACT Quiet Series and GTO are trademarks of . © 1999 DS010911
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