74ACT652 ,Transceiver/RegisterFeaturesThe ACT652 consists of bus transceiver circuits with D-
74ACT652
Transceiver/Register
74ACT652 Transceiver/Register August 1999 Revised September 2000 74ACT652 Transceiver/Register General Description Features The ACT652 consists of bus transceiver circuits with D-Independent registers for A and B buses type flip-flops, and control circuitry arranged for multiplexedMultiplexed real-time and stored data transmission of data directly from the input bus or from Outputs source/sink 24 mA internal registers. Data on the A or B bus will be clocked TTL-compatible inputs into the registers as the appropriate clock pin goes to the HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. Ordering Code: Order Number Package Number Package Description 74ACT652SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ACT652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT652SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description A –A , B –B A and B Inputs/3-STATE Outputs 0 7 0 7 CPAB, CPBA Clock Inputs SAB, SBA Select Inputs OEAB, OEBA Output Enable Inputs FACT is a trademark of . © 2000 DS500310
