74ACT273T Fast Delivery |IC PHOENIX CO.,LIMITED

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74ACT273T
OCTAL D-TYPE FLIP FLOP WITH CLEAR
74ACT273
OCTAL D-TYPE FLIP FLOP WITH CLEAR
PRELIMINARY DATA
May 1999 HIGH SPEED:
fMAX= 190MHzns (TYP.)at VCC =5V LOWPOWER DISSIPATION:
ICC=8μA (MAX.)atTA =25oC COMPATIBLEWITH TTL OUTPUTS
VIH =2V (MIN),VIL= 0.8V(MAX) 50Ω TRANSMISSIONLINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL= 24mA(MIN) BALANCED PROPAGATIONDELAYS:
tPLH≅ tPHL OPERATINGVOLTAGERANGE:
VCC (OPR)= 4.5Vto 5.5V PIN AND FUNCTION COMPATIBLE WITH SERIES273 IMPROVEDLATCH-UP IMMUNITY
DESCRIPTION
The ACT273isa high-speed CMOS OCTAL
D-TYPE FLIP FLOP WITH CLEAR fabricated
with sub-micron silicon gate and double-layer
metal wiringC2 MOS technology.Itis idealforlow
power applications mantaining high speed
operation similarto equivalent Bipolar Schottky
TTL.
Information signals appliedtoD inputs are
transferedto theQ outputon the positive going
edgeofthe clock pulse.
Whenthe CLEAR inputis held low,theQ outputs
are heldlow independentelyofthe other inputs.
The deviceis designedto interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
(Micro Package)
(Plastic Package)
(TSSOP Package)
ORDER CODES:
74ACT273B
74ACT273M
74ACT273T
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INPUT AND OUTPUT EQUIVALENT CIRCUIT
LOGIC DIAGRAMS
PIN DESCRIPTION
PINNo SYMBOL NAME AND FUNCTION CLEAR Asyncronous Master
Reset (Active LOW)
2,5, 6,9,12,
15, 16,19
Q0toQ7 Flip-Flop Outpus
3,4, 7,8,13,
14, 17,18
D0toD7 Data Inputs CLOCK Clock Input
(LOW-to-HIGH, Edge-
Triggered) GND Ground (0V) VCC Positive Supply Voltage
TRUTH TABLE
INPUTS OUTPUTS FUNCTION
CLEAR D CLOCK Q X X L CLEAR L H Qn NOCHANGE
X:Don’tCare
Thislogicdiagram hasnotbeusedtoesimate propagation delays
74ACT273
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ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage -0.5to+7 V DC Input Voltage -0.5toVCC +0.5 V DC Output Voltage -0.5toVCC +0.5 V
IIK DC Input Diode Current ±20 mA
IOK DC Output Diode Current ±20 mA DC Output Current ±50 mA
ICCorIGND DCVCCor Ground Current ±400 mA
Tstg Storage Temperature -65 to+150 oC Lead Temperature(10 sec) 300 oC
AbsoluteMaximumRatingsarethosevalues beyond whichdamage tothedevicemayoccur. Functionaloperationunderthese conditionisnot implied.
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
VCC Supply Voltage 4.5to5.5 V Input Voltage 0toVCC V Output Voltage 0toVCC V
Top Operating Temperature: -40to+85 oC
dt/dv Input RiseandFall TimeVCC=4.5to 5.5V (note1) 8 ns/V
1)VINfrom0.8Vto2.0V
74ACT273
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SPECIFICATIONSSymbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
VIH High Level Input Voltage 4.5 VO =0.1Vor
VCC-0.1V
2.0 1.5 2.0 V
5.5 2.0 1.5 2.0
VIL Low Level Input Voltage 4.5 VO =0.1Vor
VCC-0.1V
1.5 0.8 0.8 V
5.5 1.5 0.8 0.8
VOH High Level Output
Voltage
4.5 VI(*)=
VIHor
VIL
IO=-50μA 4.4 4.49 4.4 V
5.5 IO=-50μA 5.4 5.49 5.4
4.5 IO=-24mA 3.86 3.76
5.5 IO=-24mA 4.86 4.76
VOL Low Level Output
Voltage
4.5 VI(*)=
VIHor
VIL
IO=50μA 0.001 0.1 0.1 V
5.5 IO=50mA 0.001 0.1 0.1
4.5 IO=24mA 0.36 0.44
5.5 IO=24mA 0.36 0.44 Input Leakage Current 5.5 VI =VCCorGND ±0.1 ±1 μA
ICCT MaxICC /Input 5.5 VI =VCC-2.1V 0.6 1.5 mA
ICC Quiescent Supply
Current
5.5 VI =VCCorGND 4 40 μA
IOLD Dynamic Output Current
(note1,2)
5.5 VOLD= 1.65Vmax 75 mA
IOHD VOHD =3.85Vmin -75 mA
1)Maximumtestduration 2ms,oneoutput loaded attime
2)Incidentwave switchingisguaranteed ontransmission lineswithimpedances aslowas50Ω.
74ACT273
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ELECTRICAL CHARACTERISTICS(CL=50pF,RL= 500Ω, Inputtr=tf=3ns)Symbol Parameter Test Condition Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
tPLH
tPHL
Propagation Delay TimetoQ
5.0(*) 1.5 6.5 8.5 1.5 9.0 ns
tPLH
tPHL
Propagation Delay Time
CLRtoQ
5.0(*) 1.5 7.0 9.0 1.5 9.5 ns
twL CLR pulse Width, LOW 5.0(*) 1.5 4.0 4.0 ns CK pulse Width 5.0(*) 1.0 4.0 4.0 ns Setup TimeQtoCK
HIGHor LOW
5.0(*) 1.0 3.5 3.5 ns Hold TimeQtoCK
HIGHor LOW
5.0(*) -0.5 1.5 1.5 ns
tREM Recovery Time CLRto
5.0(*) 0.5 3.0 3.0 ns
fMAX Maximum Clock
Frequency
5.0(*) 125 190 110 MHz
(*) Voltagerangeis5V±0.5V
CAPACITIVE CHARACTERISTICS
Symbol Parameter Test Conditions Value Unit
VCC
(V) =25oC -40to85oC
Min. Typ. Max. Min. Max.
CIN Input Capacitance 5.0 4 pF
CPD Power Dissipation
Capacitance (note1)
5.0 fIN =10MHz 32 pF
1)CPDisdefinedasthevalueoftheIC’sinternalequivalentcapacitance whichiscalculatedfromtheoperatingcurrentconsumption withoutload.(Referto
TestCircuit).Average operting current canbeobtainedbythefollowingequation. ICC(opr) =CPD•VCC• fIN+ICC/n(per circuit)
74ACT273
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TEST CIRCUIT =50pForequivalent(includes jigandprobecapacitance)=R1 =500Ωorequivalent
RT=ZOUTofpulsegenerator (typically50Ω)
WAVEFORM1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
74ACT273
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Partno	Mfg	Dc	Qty	Available	Descript
74ACT273T	ST	N/a	127	avai	OCTAL D-TYPE FLIP FLOP WITH CLEAR