74ACT16623DLR ,16-Bit Bus Transceivers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
74ACT16640DLR ,16-Bit Bus Transceivers With 3-State Outputs 48-SSOP -40 to 85
74ACT16657DL , 16-BIT TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS
74ACT16657DL , 16-BIT TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS
74ACT16821DLR ,20-Bit Bus-Interface Flip-Flops With 3-State Outputs 56-SSOP -40 to 85
74ACT16823DLR ,18-Bit Bus-Interface Flip-Flops with 3-State Outputs 54ACT16823, 74ACT16823 18-BIT BUS-INTERFACE FLIP-FLOPSWITH 3-STATE OUTPUTSSCAS160A – APRIL 1991 – ..
74HC174N ,Hex D-type flip-flop with reset; positive-edge triggerPin configuration DIP16 Fig 5.
74HC174PW ,Hex D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175D ,Quad D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175DB ,Quad D-type flip-flop with reset; positive-edge triggerGENERAL DESCRIPTIONcorresponding output (Q ) of the flip-flop.nThe 74HC/HCT175 are high-speed Si-ga ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerFeatures and benefits Input levels: For 74HC175: CMOS level For 74HCT175: TTL level Four edge-t ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerapplications where both the truestandard no. 7A.and complement outputs are required and the clock a ..
74ACT16623DL-74ACT16623DLR
16-Bit Bus Transceivers With 3-State Outputs
Distributed VCC and GND Pin ConfigurationMinimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted
CMOS) 1-m m Process Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
descriptionThe ’ACT16623 are 16-bit transceivers designed
for asynchronous two-way communication between
data buses. The control-function implementation
allows for maximum flexibility in timing.
These devices can be used as two 8-bit
transceivers or one 16-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic
level at the output-enable (OEBA and OEAB)
inputs. The output-enable inputs can be used to
disable the device so that the buses are effectively
isolated.
The dual-enable configuration gives the bus transceiver the capability to store data by simultaneously enabling
OEBA and OEAB. Each output reinforces its input in this transceiver configuration. When both control inputs
are enabled and all other data sources to the two sets of bus lines are at high impedance, the bus lines remain
at their last states.
The 74ACT16623 is packaged in TI’s shrink small-outline package, which provides twice the functionality of
standard small-outline packages in the same printed-circuit-board area.
The 54ACT16623 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16623 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4CC
2B5
2B6
GND
2B7
2B8
2OEAB
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4CC
2A5
2A6
GND
2A7
2A8
2OEBA
