74ACT1284MTCX ,IEEE1284 Transceiver74ACT1284 IEEE 1284 TransceiverJune 1996Revised November 200074ACT1284IEEE 1284 Transceiver
74ACT138 ,3 TO 8 LINE DECODER (INVERTING)FeaturesYI reduced by 50%The ’AC/’ACT138 is a high-speed 1-of-8 decoder/demulti- CCYplexer. This de ..
74ACT138B ,3 TO 8 LINE DECODER (INVERTING)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74ACT138M ,3 TO 8 LINE DECODER (INVERTING)74ACT1383 TO 8 LINE DECODER (INVERTING) ■ HIGH SPEED: t = 5ns (TYP.) at V = 5VPD CC■ LOW POWER DIS ..
74ACT138M ,3 TO 8 LINE DECODER (INVERTING)74ACT1383 TO 8 LINE DECODER (INVERTING) ■ HIGH SPEED: t = 5ns (TYP.) at V = 5VPD CC■ LOW POWER DIS ..
74ACT138M ,3 TO 8 LINE DECODER (INVERTING)LOGIC DIAGRAM This
74HC161N ,74HC/HCT161; Presettable synchronous 4-bit binary counter; asynchronous resetINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC161PW ,Presettable synchronous 4-bit binary counter; asynchronous resetINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC163D ,74HC/HCT163; Presettable synchronous 4-bit binary counter; synchronous resetINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC163N ,Presettable synchronous 4-bit binary counter; synchronous resetINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC164 ,8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERSM54HC164M74HC1648 BIT SIPO SHIFT REGISTER. HIGH SPEEDt = 15 ns (TYP.) AT V =5VPD CC. LOW POWER DISS ..
74HC164D ,8-bit serial-in, parallel-out shift registerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74ACT1284MSAX-74ACT1284MTCX
IEEE1284 Transceiver
74ACT1284 IEEE 1284 Transceiver June 1996 Revised November 2000 74ACT1284 IEEE 1284 Transceiver General Description Features The 74ACT1284 contains four non-inverting bidirectionalTTL-compatible inputs buffers and three non-inverting buffers with open Drain out-A Ports have standard 4 mA totem pole outputs puts and high drive capability on the B Ports. It is intended Typical input hysteresis of 0.5V to provide a standard signaling method for a bi-direction B Port high drive source/sink capability of 14 mA parallel peripheral in an Extended Capabilities Port mode Bidirectional non-inverting buffers (ECP). The HD (active HIGH) input pin enables the B Ports toSupports IEEE P1284 Level 1 and Level 2 signaling standards for bidirectional parallel communications switch from open Drain to a high drive totem pole output, capable of sourcing 14 mA on all seven buffers. The DIR between personal computers and printing peripherals input determines the direction of data flow on the bidirec-B Port outputs in High Impedance mode during power tional buffers. DIR (active HIGH) enables data flow from down A Ports to B Ports. DIR (active LOW) enables data flow Guaranteed 4000V minimum ESD protection from B Ports to A Ports. Ordering Code: Order Number Package Number Package Description 74ACT1284SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACT1284MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74ACT1284MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Connection Diagram Pin Descriptions Pin Names Description HD High Drive Enable input (Active HIGH) DIR Direction Control Input A - A Side A Inputs or Outputs 1 4 B - B Side B Inputs or Outputs 1 4 A - A Side A Inputs 5 7 B - B Side B Outputs 5 7 FACT is a trademark of . © 2000 DS011683
