74ACT125MTR ,QUAD BUS BUFFER (3-STATE)74ACT125QUAD BUS BUFFERS (3-STATE) ■ HIGH SPEED: t = 5ns (TYP.) at V = 5VPD CC■ LOW POWER DISSIPAT ..
74ACT125MTR ,QUAD BUS BUFFER (3-STATE)Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional o ..
74ACT125PC ,Quad Buffer with 3-STATE OutputsFeaturesThe AC/ACT125 contains four independent non-inverting
74ACT125B-74ACT125M-74ACT125MTR-74ACT125TTR
QUAD BUS BUFFER (3-STATE)
1/9July 2001 HIGH SPEED: tPD = 5ns (TYP .) at VCC = 5V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), VIL = 0.8V (MAX.) 50Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125 IMPROVED LATCH-UP IMMUNITY
DESCRIPTIONThe 74ACT125 is an advanced high-speed CMOS
QUAD BUS BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C2 MOS
technology.
This device require the 3-STATE control input G to
be set high to place the output in high impedance
state.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74ACT125QUAD BUS BUFFERS (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74ACT1252/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS 1) VIN from 0.8V to 2.0V
74ACT1253/9
DC SPECIFICATIONS 1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) (*) Voltage range is 5.0V ± 0.5V
74ACT1254/9
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per buffer)
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74ACT1255/9
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
