74AC299SCX ,8-Input Universal Shift/Storage Register with Common I/O Pinsapplicationscascading. A separate active LOW Master Reset is used toreset the register.
74AC299PC-74AC299SC-74AC299SCX-74AC299SJ-74ACT299SCX
8-Input Universal Shift/Storage Register with Common I/O Pins
74AC299 • 74ACT299 8-Input Universal Shift/Storage Register July 1988 Revised March 2005 74AC299 74ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins General Description Features The AC/ACT299 is an 8-bit universal shift/storage registerI and I reduced by 50% CC OZ with 3-STATE outputs. Four modes of operation are possi- Common parallel I/O for reduced pin count ble: hold (store), shift left, shift right and load data. The par- Additional serial inputs and outputs for expansion allel load inputs and flip-flop outputs are multiplexed to Four operating modes: shift left, shift right, load reduce the total number of package pins. Additional out- and store puts are provided for flip-flops Q , Q to allow easy serial 0 7 3-STATE outputs for bus-oriented applications cascading. A separate active LOW Master Reset is used to reset the register.Outputs source/sink 24 mA ACT299 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC299SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74AC299SCX_NL M20B Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" (Note 1) Wide 74AC299SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC299MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74AC299PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74ACT299SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACT299MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT299PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Connection Diagram Pin Descriptions Pin Names Description CP Clock Pulse Input DS Serial Data Input for Right Shift 0 DS Serial Data Input for Left Shift 7 S , S Mode Select Inputs 0 1 MR Asynchronous Master Reset OE , OE 3-STATE Output Enable Inputs 1 2 I/O –I/O Parallel Data Inputs or 0 7 3-STATE Parallel Outputs Q , Q Serial Outputs 0 7 FACT¥ is a trademark of . © 2005 DS009893
