74AC257MTR ,QUAD 2 CHANNEL MULTIPLEXER (3-STATE)ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage-0.5 to +7 VCCV DC Input V ..
74AC257PC ,Quad 2-Input Multiplexer with 3-STATE OutputsFunctional Description Truth TableThe AC/ACT257 is quad 2-input multiplexer with 3-STATEOutput Sele ..
74AC257SCX ,Quad 2-Input Multiplexer with 3-STATE OutputsFeaturesThe AC/ACT257 is a quad 2-input multiplexer with 3-
74AC257B-74AC257MTR
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
1/11April 2001 HIGH SPEED: tPD = 4.5ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS:PLH ≅ tPHL OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257 IMPROVED LATCH-UP IMMUNITY
DESCRIPTIONThe 74AC257 is an advanced high-speed CMOS
QUAD 2-CHANNEL MULTIPLEXER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2 MOS tecnology.
It is composed of four independent 2-channel
multiplexer with common SELECT and ENABLE
(OE) inputs. It is a non-inverting multiplexer. When
the OE input is held HIGH,all the output become in
high impedance state. If SELECT input is held
LOW, "A" data is selected, when SELECT input is
held HIGH, "B" data is chosen.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC257QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74AC2572/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays
74AC2573/11
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS 1) VIN from 30% to 70% of VCC
74AC2574/11
DC SPECIFICATIONS 1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
74AC2575/11
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per circuit)
74AC2576/11
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle)
