74AC240MTR ,OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)Absolute Maximum Ratings are those values beyond which damage to the device may occour. Functional ..
74AC240PC ,Octal Buffer/Line Driver with 3-STATE OutputsFeaturesThe AC/ACT240 is an octal buffer and line driver designed
74AC240B-74AC240M-74AC240MTR
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
1/9April 2001 HIGH SPEED: tPD = 4.2ns (TYP.) at VCC = 5V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS:PLH ≅ tPHL OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 240 IMPROVED LATCH-UP IMMUNITY
DESCRIPTIONThe 74AC240 is an advanced high-speed CMOS
OCTAL BUS BUFFER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C2 MOS tecnology.
G control input governs four BUS BUFFERs.
This device is designed to be used with 3 state
memory address drivers, etc.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC240OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (INVERTED)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74AC2402/9
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE X : Don’t Care
Z : High Impedance
ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are those values beyond which damage to the device may occour. Functional operation under these conditions
is not implied.
RECOMMENDED OPERATING CONDITIONS 1) VIN from 30% to 70% of VCC
74AC2403/9
DC SPECIFICATIONS 1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
74AC2404/9
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit)
TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74AC2405/9
WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
