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74AC158FAIN/a250avaiQUAD 2 CHANNEL MULTIPLEXER (INV.)


74AC161 ,4-Bit Binary Counter, Asynchronous Reset74AC161SYNCHRONOUS PRESETTABLE 4-BIT COUNTER ■ HIGH SPEED: f = 125MHz (TYP.) at V = 5VMAX CC■ LOW ..
74AC161M ,SYNCHRONOUS PRESETTABLE 4-BIT COUNTER74AC161SYNCHRONOUS PRESETTABLE 4-BIT COUNTER ■ HIGH SPEED: f = 125MHz (TYP.) at V = 5VMAX CC■ LOW ..
74AC161MTCX ,Synchronous Presettable Binary CounterFeaturesThe AC/ACT161 are high-speed synchronous modulo-16

74AC158
QUAD 2 CHANNEL MULTIPLEXER (INV.)
1/10April 2001 HIGH SPEED: tPD = 4ns (TYP .) at VCC = 5V LOW POWER DISSIPATION:CC = 4μA(MAX.) at TA =25°C HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING
CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE:OH | = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: PLH ≅ t PHL OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 158 IMPROVED LATCH-UP IMMUNITY
DESCRIPTION

The 74AC158 is an advanced high-speed CMOS
QUAD 2-CHANNEL MULTIPLEXER
(INVERTING) fabricated with sub-micron silicon
gate and double-layer metal wiring C2 MOS
tecnology.
It consists of four 2-input digital multiplexer with
common select and strobe inputs. It is an inverting
multiplexer. When the STROBE input is held high
selection of data is inhibit and all the outputs
become high. The SELECT decoding determines
whether the A or B inputs get routed to their
corresponding Y outputs.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74AC158

QUAD 2 CHANNEL MULTIPLEXER (INV.)
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
74AC158
2/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE

X : Don’t Care
LOGIC DIAGRAM
74AC158
3/10
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS

1) VIN from 30% to 70% of VCC
74AC158
4/10
DC SPECIFICATIONS

1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
74AC158
5/10
AC ELECTRICAL CHARACTERISTICS (C
L = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5.0V ± 0.5V
CAPACITIVE CHARACTERISTICS

1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit)
TEST CIRCUIT

CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
74AC158
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WAVEFORM 1: PROPAGATION DELAYS FOR NON INVERTING CONDITIONS (f=1MHz; 50% duty

cycle)
WAVEFORM 2: PROPAGATION DELAYS FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle)

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