74AC11257N ,Quadruple 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
74AC11257PW ,Quadruple 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
74AC11533NT , OCTAL D-TYPE TRANSPARENY LATCHES WITH 3-STATE OUTPUTS
74AC11534NT ,Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs 24-PDIP -40 to 85
74AC11643 ,Octal Bus Transceivers With 3-State Outputs 24-SSOP -40 to 85
74AC11646D ,5 V, octal transceiver/register with direction pin (3-state)
74HC00 ,QUADRUPLE 2-INPUT NAND GATESMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard aga ..
74HC00BQ ,Quad 2-input NAND gate
74HC00DB ,Quad 2-input NAND gate
74HC02 ,Quad 2-input NOR gateMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agai ..
74HC03D ,Quad 2-input NAND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nY ..
74HC03N ,Quad 2-input NAND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nY ..
74AC11257N-74AC11257PW
Quadruple 2-Line To 1-Line Data Selectors/Multiplexers With 3-State Outputs
74AC11257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER
WITH 3-STATE OUTPUTS
SCAS049C − MARCH 1989 − REVISED MAY 2004
3-State Outputs Interface Directly With
System Bus Flow-Through Architecture Optimizes
PCB Layout Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise 500-mA Typical Latch-Up Immunity at
125°C Provides Bus Interface From Multiple
Sources in High-Performance Systems
description/ordering informationThis device is designed to multiplex signals from 4-bit data sources to four output data lines in bus-organized
systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at a high logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLEPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
