74AC11244DW ,Octal Buffers/Driversmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
74AC11244DWG4 ,Octal Buffers/Drivers 24-SOIC -40 to 85maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
74AC11244PW ,Octal Buffers/Driverslogic diagram (positive logic)24131OE2OE12391A1 1Y1 172A1 2Y121022161A2 1Y22A2 2Y232111151A3 1Y32A3 ..
74AC11245DW ,Octal Bus Transceiversmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
74AC11245DWR ,Octal Bus Transceivers 74AC11245 OCTAL BUS TRANSCEIVERWITH 3-STATE OUTPUTSSCAS010B – JULY 1987 – REVISED APRIL 1996DB, DW ..
74AC11253N ,Dual 4-Line To 1-Line Data Selectors/Multiplexers 16-PDIP -40 to 85
74HC00 ,QUADRUPLE 2-INPUT NAND GATESMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard aga ..
74HC00BQ ,Quad 2-input NAND gate
74HC00DB ,Quad 2-input NAND gate
74HC02 ,Quad 2-input NOR gateMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard agai ..
74HC03D ,Quad 2-input NAND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nY ..
74HC03N ,Quad 2-input NAND gatePin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nY ..
74AC11244-74AC11244DW-74AC11244DWG4-74AC11244PW
Octal Buffers/Drivers
Layout Center-Pin VCC and GND Pin
Configurations Minimize High-Speed
Switching Noise 500-mA Typical Latch-Up Immunity at
125°C Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, and Standard Plastic DIPs (NT)
descriptionThe 74AC11244 is an octal buffer or line driver designed specifically to improve both the performance and
density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The
device can be used as two 4-bit buffers or one 8-bit buffer, with active-low output-enable (OE) inputs.
When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the
outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The 74AC11244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each driver)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1Y3
1Y4
GND
GND
GND
GND
2Y1
2Y2
2Y3
2Y4
1A2
1A3
1A4
VCC
VCC
2A1
2A2
2A3
2A4
2OE
