74AC11138N ,3-Line to 8-Line Decoders/Demultiplexers SCAS042B − MAY 1988 − REVISED APRIL 1996D, N, OR PW PACKA ..
74AC11138N ,3-Line to 8-Line Decoders/Demultiplexersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
74AC11138NSR ,3-Line to 8-Line Decoders/Demultiplexersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
74AC11157DWR ,Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 20-SOIC -40 to 85
74AC11157N ,QUAD 2 INPUT MULTIPLEXER
74AC11175N ,5 V, quad D-type flip-flop with reset, positive-edge trigger
74H1G66S ,SINGLE BILATERAL SWITCHABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Supply Voltage -0.5 to +13 VCCV DC Input Volta ..
74H21 , DUAL 4-INPUT POSITIVE AND GATE
74H21DC , DUAL 4-INPUT POSITIVE AND GATE
74HC00 ,QUADRUPLE 2-INPUT NAND GATESMAXIMUM RATINGSÎÎ Symbol Parameter Value UnitThis device contains protectioncircuitry to guard aga ..
74HC00BQ ,Quad 2-input NAND gate
74HC00DB ,Quad 2-input NAND gate
74AC11138N-74AC11138NSR
3-Line to 8-Line Decoders/Demultiplexers
Center-Pin VCC and GND ConfigurationsMinimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at
125°C Package Options Include Plastic
Small-Outline (D) and Thin Shrink
Small-Outline (PW) Packages, and
Standard Plastic 300-mil DIPs (N)
descriptionThe 74AC11138 circuit is designed to be used in high-performance memory-decoding or data-routing
applications requiring very short propagation delay times. In high-performance memory systems, this decoder
can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing
a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than
the typical access time of the memory. This means that the effective system delay introduced by the decoder
is negligible.
The conditions at the binary-select (A, B, C) inputs and the three enable (G1, G2A, G2B) inputs select one of
eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or
inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line
decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.
The 74AC11138 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
