74ABT16652CSSC ,Octal Transceivers and Registers with 3-STATE OutputsFeaturesThe ABT16652 consists of sixteen bus transceiver circuits Independent registers for A and ..
74ABT16652CSSC ,Octal Transceivers and Registers with 3-STATE Outputs74ABT16652 16-Bit Transceivers and Registers with 3-STATE OutputsApril 1993Revised January 199974AB ..
74ABT16652CSSC ,Octal Transceivers and Registers with 3-STATE OutputsFeaturesThe ABT16652 consists of sixteen bus transceiver circuits Independent registers for A and ..
74ABT16652CSSCX ,Octal Transceivers and Registers with 3-STATE OutputsFeaturesThe ABT16652 consists of sixteen bus transceiver circuits Independent registers for A and ..
74ABT16652DGG ,16-bit transceiver/register, non-inverting 3-State
74ABT16652DL ,16-bit transceiver/register, non-inverting 3-State
74f899 ,9-Bit Latchable Transceiver with Parity Generator/CheckerFunctional DescriptionThe 74F899 has three principal modes of operation which • Bus A (B) communica ..
74F899QC ,9-Bit Latchable Transceiver with Parity Generator/CheckerFunctional DescriptionThe 74F899 has three principal modes of operation which • Bus A (B) communica ..
74F899QCX ,9-Bit Latchable Transceiver with Parity Generator/CheckerFunctional DescriptionThe 74F899 has three principal modes of operation which • Bus A (B) communica ..
74F899QCX ,9-Bit Latchable Transceiver with Parity Generator/CheckerFunctional DescriptionThe 74F899 has three principal modes of operation which • Bus A (B) communica ..
74F899SC ,9-Bit Latchable Transceiver with Parity Generator/CheckerFeaturesThe 74F899 is a 9-bit to 9-bit parity transceiver with trans- Latchable transceiver with o ..
74F899SC ,9-Bit Latchable Transceiver with Parity Generator/Checkerapplications in place of the74F543 and 74F280 May be used in system
74ABT16652CMTDX-74ABT16652CSSC-74ABT16652CSSCX
Octal Transceivers and Registers with 3-STATE Outputs
74ABT16652 16-Bit Transceivers and Registers with 3-STATE Outputs April 1993 Revised January 1999 74ABT16652 16-Bit Transceivers and Registers with 3-STATE Outputs General Description Features The ABT16652 consists of sixteen bus transceiver circuits � Independent registers for A and B buses with D-type flip-flops, and control circuitry arranged for mul- � Multiplexed real-time and stored data tiplexed transmission of data directly from the input bus or � Separate control logic for each byte from the internal registers. Each byte has separate control � A and B output sink capability of 64 mA, source inputs which can be shorted together for full 16-bit opera- capability of 32 mA tion. Data on the A or B bus will be clocked into the regis- � Guaranteed output skew ters as the appropriate clock pin goes to HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control � High impedance glitch free bus loading during entire the transceiver function. power up and power down cycle � Nondestructive hot insertion capability Ordering Code: Order Number Package Number Package Description 74ABT16652CSSC MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ABT16652CMTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Pin Descriptions Connection Diagram Pin Names Descriptions A –A Data Register A Inputs/ 0 16 3-STATE Outputs B –B Data Register B Inputs/ 0 16 3-STATE Outputs CPAB , CPBA Clock Pulse Inputs n n SAB , SBA Select Inputs n n OEAB , OEBA Output Enable Inputs n n © 1999 DS011599.prf
