74ABTH16373BDL ,16-bit transparent latch 3-StateFEATURESoutputs. When nOE is High, the outputs are in the High-impedance• 16-bit transparent latc ..
74ABTH16500C ,18-bit universal bus transceiver (3-State)
74ABTH16646DL ,16-bit bus transceiver/register 3-State
74ABTH16646DL ,16-bit bus transceiver/register 3-State
74ABTH16821ADGG ,20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State
74ABTH16821ADGG ,20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State
74FR16245QC ,16-Bit Transceiver with 3-STATE Outputsapplications. Current sinking capability is 64 mA A and B output sink capability of 64 mA, sourceon ..
74FR16540 ,16-Bit Buffer/Line Driver with 3-STATE OutputsFeaturesThe 74FR16540 contains sixteen inverting buffers with 3- Inverting buffersSTATE outputs de ..
74FR16540QC ,16-Bit Buffer/Line Driver with 3-STATE OutputsFeaturesThe 74FR16540 contains sixteen inverting buffers with 3- Inverting buffersSTATE outputs de ..
74FR16541SSCX , 16-Bit Buffer/Line-Driver with 3-STATE OutputsFeaturesThe 74FR16541 contains sixteen non-inverting buffers with Non-inverting buffers3-STATE out ..
74FR240SJ ,Octal Buffer/Line Driver with 3-STATE OutputsFeaturesThe 74FR240 is an inverting octal buffer and line driver 3-STATE outputs drive bus lines o ..
74FR244 ,Octal Buffer Line Driver with Tri-State Outputs74FR244OctalBuffer/LineDriverwithTRI-STATEOutputsMay199574FR244OctalBuffer/LineDriverwithTRI-STATEÉ ..
74ABT16373BDGG-74ABT16373BDL-74ABTH16373BDL
16-bit transparent latch 3-State
Product specification
Supersedes data of 1995 Aug 03
IC23 Data Handbook
1998 Feb 27
Philips Semiconductors Product specification
74ABT16373B
74ABTH16373B16-bit transparent latch (3-State)
FEATURES 16-bit transparent latch Multiple VCC and GND pins minimize switching noise Power-up 3-State Live insertion/extraction permitted Power-up reset 3-State output buffers 74ABTH16373B incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs Output capability: +64mA/–32mA ICCL –19 mA maximum Latch-up protection exceeds 500mA per JEDEC Std 17 ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTIONThe 74ABT16373B high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16373B device is a dual octal transparent latch coupled
to two sets of eight 3-State output buffers. The two sections of the
device are controlled independently by Enable (nE) and Output
Enable (nOE) control gates.
The data on each set of D inputs are transferred to the latch outputs
when the Latch Enable (nE) input is High. The latch remains
transparent to the data inputs while nE is High, and stores the data
that is present one setup time before the High-to-Low enable
transition.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. Each
active-Low Output Enable (nOE) controls eight 3-State buffers
independent of the latch operation.
When nOE is Low, the latched or transparent data appears at the
outputs. When nOE is High, the outputs are in the High-impedance
“OFF” state, which means they will neither drive nor load the bus.
Two options are available, 74ABT16373B which does not have the
bus-hold feature and 74ABTH16373B which incorporates the
bus-hold feature.
PIN CONFIGURATION
QUICK REFERENCE DATA
ORDERING INFORMATION
Philips Semiconductors Product specification
74ABT16373B
74ABTH16373B16-bit transparent latch (3-State)
PIN DESCRIPTION
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
LOGIC DIAGRAM
Philips Semiconductors Product specification
74ABT16373B
74ABTH16373B16-bit transparent latch (3-State)
FUNCTION TABLE= High voltage level= High voltage level one set-up time prior to the High-to-Low E transition= Low voltage level = Low voltage level one set-up time prior to the High-to-Low E transition
NC= No change= Don’t care= High impedance “off” state= High-to-Low E transition
ABSOLUTE MAXIMUM RATINGS1, 2
NOTES: Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74ABT16373B
74ABTH16373B16-bit transparent latch (3-State)
DC ELECTRICAL CHARACTERISTICS
NOTES: Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input at 3.4V. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1 to VCC = 5V ± 10% a
transition time of up to 100μsec is permitted. Unused pins at VCC or GND. This is the bus hold overdrive current required to force the input to the opposite logic state.
Philips Semiconductors Product specification
74ABT16373B
74ABTH16373B16-bit transparent latch (3-State)
AC CHARACTERISTICSGND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
AC SETUP REQUIREMENTSGND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
AC WAVEFORMSFor all waveforms, VM = 1.5V.
Waveform 1. Propagation Delay, Enable to Output, and
Enable Pulse Width
Waveform 2. Propagation Delay for Data to Outputs
