SN54F138J ,3-Line To 8-Line Decoders/Demultiplexersmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN54F153J ,Dual 1-Of-4 Data Selectors/Multiplexersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN54F153J ,Dual 1-Of-4 Data Selectors/Multiplexers SDFS052A − D2932, MARCH 1987 − REVISED OC ..
SN54F175J , QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR
SN54F20J ,Dual 4-Input Positive-NAND Gates SN54F20, SN74F20 DUAL 4-INPUT POSITIVE-NAND GATES SDFS041A – MARCH 1987 – REVISED OCTOBER 1993SN54 ..
SN54F20J. ,Dual 4-Input Positive-NAND Gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F11DR ,Triple 3-input positive-AND gateselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
SN74F11N ,Triple 3-input positive-AND gatesmaximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
SN74F125 ,Quadruple Bus Buffer Gate With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74F125 ,Quadruple Bus Buffer Gate With 3-State Outputsfeatures independent line drivers6 92Y 3Awith 3-state outputs. Each output is disabled when7 8GND 3 ..
SN74F125D ,Quadruple Bus Buffer Gate With 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74F125DR ,Quadruple Bus Buffer Gate With 3-State Outputslogic diagram (positive logic)11OE231A 1Y42OE562A 2Y103OE983A 3Y134OE12 114A 4Y†absolute
5962-9758201Q2A-JM38510/33701BEA-SN54F138J-SNJ54F138J
3-Line To 8-Line Decoders/Demultiplexers
Package Options Include PlasticSmall-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
descriptionThe ′F138 is designed to be used in
high-performance memory-decoding or data-
routing applications requiring very short
propagation delay times. In high-performance
memory systems, these decoders can be used to
minimize the effects of system decoding. When
employed with high-speed memories utilizing a
fast enable circuit, the delay times of this decoder
and the enable time of the memory are usually
less than the typical access time of the memory.
This means that the effective system delay
introduced by the decoder is negligible.
The conditions at the binary-select inputs and the
three enable inputs select one of eight output
lines. Two active-low and one active-high enable
inputs reduce the need for external gates or
inverters when expanding. A 24-line decoder can
be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can
be used as a data input for demultiplexing applications.
The SN54F138 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74F138 is characterized for operation from 0°C to 70°C.
SN54F138... FK PACKAGE
(TOP VIEW)G2A
G2BANCY5Y0
GND
NC – No internal connection
G2A
G2B
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
