5962-9459101MYA ,Low Power 8-Bit Shift RegisterGeneral DescriptionThe F100341 contains eight edge-trigged, D-type flipflops with individual inputs ..
5962-9466903QXA ,Floating-Point Digital Signal Processors, Militaryfeatures of the DMA processor are:D Link pointers that allow DMA channels to autoinitialize without ..
5962-9469601VFA ,Low-Skew Quad Clock DriverLogic DiagramDS100319-1Connection DiagramPin Names DescriptionCLKIN, CLKIN Differential Clock Input ..
5962-9564201QSA ,3.3-V ABT Octal Bus Transceivers With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
5962-9583301QFA ,LVDS Quad CMOS Differential Line DriverFeaturesn >155.5 Mbps (77.7 MHz) switching ratesThe DS90C031 is a quad CMOS differential line drive ..
5962-9584401QSA ,3.3-V ABT Octal Buffers/Drivers With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
7464 ,DIGITALLY CONTROLLED AUDIO PROCESSOR WITH SRS SURROUND SOUND AND VOICE CANCELLERTDA7464DIGITALLY CONTROLLED AUDIO PROCESSOR WITHSRS SURROUND SOUND AND VOICE CANCELLERThe Device in ..
7473 ,Dual Master-Slave J-K Flip-Flops with Clear and Complementary OutputsGeneral Descriptiontransferred to the slave. The logic states of the J and KThis device contains tw ..
747905-2 , RECEPTACLE ASSEMBLY, SOLDER CUP, SIZE 1, 9 POSITION, AMPLMITE
7486 ,Quad 2-Input Exclusive-OR GateDM7486 Quad 2-Input Exclusive-OR GateSeptember 1986Revised February 2000DM7486 Quad 2-Input Exclusi ..
7489 ,64 Bit RAM89
CONNECTION DIAGRAM
PINOUT A
/ suiiiiiicf"""'"
4
LS/74LS89 d) // 17fd?
64-BIT RANDO ..
749020010 , Spezifikation für Freigabe specification for release
5962-9459101MYA
Low Power 8-Bit Shift Register
Original Creation Date: 10/04/96
Last Update Date: 05/07/04
Last Major Revision Date: 08/18/99
MN100341-X REV 2B0
MICROCIRCUIT DATA SHEET
LOW POWER 8-BIT SHIFT REGISTER
General DescriptionThe F100341 contains eight edge-trigged, D-type flipflops with individual inputs (Pn) and
outputs (Qn) for parallel operation and with serial inputs (Dn) and steering logic for
bidirectional shifting. The flip-flops accept input data a setup time before the
positive-going transistion of the clock pulse and their outputs respond a propagation
delay after the rising clock edge.
The circuit operating mode is determined by the Select inputs S0 and S1, which are
internally decoded to select either "parallel entry" "hold", "shift left" or "shift right"
as described in the Truth Table. All inputs have 50K ohms pull down resistor.
NS Part Numbers100341DMQB
100341FMQB
100341J-QMLV
100341W-QMLV
100341WFQMLV
Industry Part NumberPrime Die
F341
Controlling DocumentSEE FEATURES SECTION
ProcessingMIL-STD-883, Method 5004
Quality Conformance InspectionMIL-STD-883, Method 5005
Subgrp Description Temp ( C)o Static tests at +25 Static tests at +125 Static tests at -55 Dynamic tests at +25 Dynamic tests at +125 Dynamic tests at -55 Functional tests at +25 Functional tests at +125 Functional tests at -55 Switching tests at +25 Switching tests at +125 Switching tests at -55
