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Low Power 4-Stage Counter/Shift Register
Original Creation Date: 10/30/95
Last Update Date: 10/21/96
Last Major Revision Date: 10/16/96MN100336-X REV 2A0
MILITARY DATA SHEET
4-STAGE COUNTER/SHIFT REGISTER
The F100336 operates as either a modulo-16 up/down counter or as a 4-bit bidirectional
shift register. Three Select (Sn) inputs determine the mode of operation, as shown in the
Function Select table. Two Count Enable (CEP, CET) inputs are provided for ease of
cascading in multistage counters. One Count Enable (CET) input also doubles as a Serial
Data (Do) Input for shift-up operation. For shift-down operation D3 is the Serial Data
input. In counting operations the Terminal Count (TC) output goes LOW when the counter
reaches 15 in the count/up mode or 0 (zero) in the count/down mode. In the shift modes,
the TC output repeats the Q3 output. The dual nature of this TC/Q3 output and
Do/CET input means that one interconnection from one stage to the next higher stage serves
as the link for multistage counting or shift-up operation. The individual Preset (Pn)
inputs are used to enter data in parallel or to preset the counter in programmable counter
applications. A HIGH signal on the Master Reset (MR) input overrides all other inputs and
asynchronously clears the flip-flops. In addition, a synchronous clear is provided, as
well as a complement function which synchronously inverts the contents of the flip-flops.
All inputs have 50K ohm pull-down resistors.
NS Part Numbers
Industry Part Number
MIL-STD-883, Method 5004
Quality Conformance Inspection
MIL-STD-883, Method 5005
Subgrp Description Temp ( C)
o Static tests at +25 Static tests at +125 Static tests at -55 Dynamic tests at +25 Dynamic tests at +125 Dynamic tests at -55 Functional tests at +25 Functional tests at +125 Functional tests at -55 Switching tests at +25 Switching tests at +125 Switching tests at -55