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5962-9221503MRA |59629221503MRACYPN/a9avaiOctal D-Type Flip-Flops with Clear
CY54FCT273ATLMBTIN/a4avaiOctal D-Type Flip-Flops with Clear


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5962-9221503MRA-CY54FCT273ATLMB
Octal D-Type Flip-Flops with Clear
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
Matched Rise and Fall Times ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and
Output Logic Levels
CY54FCT273T
– 32-mA Output Sink Current
– 12-mA Output Source Current
CY74FCT273T
– 64-mA Output Sink Current
– 32-mA Output Source Current
description

The ’FCT273T devices consist of eight
edge-triggered D-type flip-flops with individual
D inputs and Q outputs. The common
buffered-clock (CP) and master-reset (MR) inputs
load and reset all flip-flops simultaneously. These
devices are edge-triggered registers. The state of
each D input (one setup time before the
low-to-high clock transition) is transferred to the
corresponding flip-flop’s Q output. All outputs are
forced low by a low logic level on the MR input.
This device is fully specified for
partial-power-down applications using Ioff . The Ioffcircuitry disables the outputs, preventing
damaging current backflow through the device
when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
CY54FCT273T... L PACKAGE
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02
GND751 MR
GND7
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