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5962-9153601MXA
Low Power Triple D Flip-Flop
Original Creation Date: 10/30/95
Last Update Date: 04/23/04
Last Major Revision Date: 08/21/96
MN100331-X REV 1B0
MICROCIRCUIT DATA SHEET
LOW POWER TRIPLE D FLIP-FLOP
General DescriptionThe F100331 contains three D-type, edge-triggered master/slave flip-flops with true and
complement outputs, a common clock (CPc), and Master Set (MS) and Master Reset (MR)
inputs. Each flip-flop has individual clock (CPn), Direct Set (SDn) and Direct Clear
(CDn) Inputs. Data enters a master when both CPn and CPc are LOW and transfers to a slave
when CPn or CPc (or both) go HIGH. The Master Set, Master Reset and individual CDn and
SDn inputs override the Clock inputs. All inputs have 50k ohm pull-down resistors.
NS Part Numbers100331DMQB
100331FMQB
100331J-QMLV
100331W-QMLV
100331WFQMLV
Industry Part NumberPrime Die
F331
Controlling DocumentSEE FEATURES SECTION
ProcessingMIL-STD-883, Method 5004
Quality Conformance InspectionMIL-STD-883, Method 5005
Subgrp Description Temp ( C)o Static tests at +25 Static tests at +125 Static tests at -55 Dynamic tests at +25 Dynamic tests at +125 Dynamic tests at -55 Functional tests at +25 Functional tests at +125 Functional tests at -55 Switching tests at +25 Switching tests at +125 Switching tests at -55