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5962-9153101MYA
Low Power Hex ECL-to-TTL Translator
Low Power Hex ECL-to-TTL Translator
General DescriptionThe 100325isahex translatorfor converting F100K logic
levels toTTLlogic levels.Differentialinputs allow each circuitbe usedasan inverting, non-invertingor differentialre-
ceiver.An internal reference voltage generator providesVBB
forsingle-ended operation,or forusein Schmitt trigger appli-
cations.All inputs have50kΩ pull-down resistors. Whenthe
inputsare either unconnectedoratthe same potentialthe
outputswillgo low.
When usedin single-ended operationthe apparent input
thresholdofthetrue inputsis20mVto40mV higher (posi-
tive) thanthe thresholdofthe complementary inputs. The
VEEand VTTL power maybe appliedin either order.
Features Pin/function compatible with 100125 Meets 100125AC specifications 50% power reductionofthe 100125 Differential inputs with builtin offset Standard FAST® outputs 2000V ESD protection −4.2Vto −5.7V operating range Availableto Microcircuit Drawing
(SMD) 5962-9153101
Logic Diagram Pin Names DescriptionD0–D5 Data Inputs
D0–D5 Inverting Data Inputs
Q0–Q5 Data Outputs
FAST® isaregistered trademarkof FairchildSemiconductor.
DS100314-4
August 1998
Low
Power
Hex
ECL-to-TTL
ranslator©1998NationalSemiconductor Corporation DS100314