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5962-8875201DA
Hex Inverter Schmitt Trigger
TL/F/9461
54F/74F14
Hex
Inverter
Schmitt
Trigger
December 1994
54F/74F14
Hex Inverter Schmitt Trigger
General Description
The ’F14 containssix logic inverters which accept standard
TTL input signalsand provide standard TTL output levels.
Theyare capableof transforming slowly changing inputsig-
nalsinto sharply defined, jitter-free output signals.In addi-
tion, they havea greater noise margin than conventional
inverters.
Each circuit containsa Schmitt trigger followedbya Darling-
ton level shifteranda phase splitter drivinga TTL totem-
pole output. The Schmitt trigger uses positive feed backto
effectively speed-up slowinputtransition,and provide differ-
ent input threshold voltagesfor positiveand negative-going
transitions. This hysteresis betweenthe positive-going and
negative-going input thresholds (typically800 mV)is deter-
mined internallyby resistor ratiosandis essentially insensi-
tiveto temperatureand supply voltage variations.
Features Guaranteed 4000V minimum ESD protection Standard Military Drawing 5962-88752
Commercial Military Package Package DescriptionNumber
74F14PC N14A 14-Lead (0.300× Wide)Molded Dual-In-Line
54F14DM (Note2) J14A 14-Lead CeramicDual-In-Line
74F14SC (Note1) M14A 14-Lead (0.150× Wide)Molded SmallOutline, JEDEC
74F14SJ (Note1) M14D 14-Lead (0.300× Wide)Molded SmallOutline, EIAJ
54F14FM(Note2) W14B 14-Lead Cerpack
54F14LM (Note2) E20A 20-Lead CeramicLeadless Chip Carrier,TypeC
Note1: Devicesalso availablein13×reel.Use SuffixeSCXandSJX.
Note2: Militarygrade device withenvironmentaland burn-in processing.Use suffixe DMQB, FMQBand LMQB.
Logic Symbol
IEEE/IEC
TL/F/9461–3
Connection Diagrams
Pin Assignment
DIP,SOICand Flatpak
TL/F/9461–1
Pin Assignment
for LCC
TL/F/9461–2
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M75/PrintedinU.S.A.
