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table am not guaranteed at the absolute maximum ratings.
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54LS51
Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-INVERT Gate
TL/F/6369
54LS51/DM74LS51
Dual
2-Wide
2-Input,
2-Wide
3-Input
AND-OR-INVERT
Gates
June 1989
54LS51/DM74LS51 Dual 2-Wide 2-Input,
2-Wide 3-Input AND-OR-INVERT Gates
General Description
This device contains two independent combinationsof
gates eachof which performsthe logic AND-OR-INVERT
function. Each package contains one 2-wide 2-input and
one 2-wide 3-input AND-OR-INVERT gates.
Connection Diagram
Dual-In-Line Package
TL/F/6369–1
OrderNumber54LS51DMQB,54LS51FMQB,
54LS51LMQB, DM74LS51Mor DM74LS51N
See NSPackage Number E20A, J14A, M14A, N14A orW14B
Function Tablee (A1) (B1) (C1)a (D1)(E1) (F1)
Inputs Output B1 C1 D1 E1 F1 Y1 H X X X L X H H H L
OtherCombinations He ((A2) (B2)a (C2) (D2))
Inputs Output B2 C2 D2 Y2 X X L H H L
Other combinations HeHigh Logic LeveleLow Logic Levele EitherLow orHighLogicLevel
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
