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54LS38N/a1avaiQuad 2-Input NAND Buffer With Open-Collector Outputs
54LS38FN/a100avaiQuad 2-Input NAND Buffer With Open-Collector Outputs


54LS38 ,Quad 2-Input NAND Buffer With Open-Collector OutputsFeatureseWhere: N (I ) totalmaximumoutputhighcurrentforall1 OHYAlternate Military/Aerospace device ..
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70543-0001 , 2.54mm (.100") Pitch SL™ Header, Single Row, Vertical, .120" Pocket, Shrouded, 2Circuits, 0.38μm (15μ") Gold (Au) Selective Plating, Tin (Sn) PC Tail Plating
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54LS38
Quad 2-Input NAND Buffer With Open-Collector Outputs
TL/F/6363
54LS38/DM54LS38/DM74LS38
Quad
2-Input
NAND
Buffers
with
Open-Collector
Outputs
June 1989
54LS38/DM54LS38/DM74LS38
Quad 2-Input NAND Buffers
with Open-Collector Outputs
General Description
This device containsfour independent gates, eachof which
performsthe logic NAND function. The open-collectorout-
puts require external pull-up resistorsfor proper logicalop-
eration.
Features Alternate Military/Aerospace device (54LS38)is avail-
able. Contacta National Semiconductor Sales Office/
Distributorfor specifications.
Pull-Up Resistor Equations
RMAXe VCC (Min)b VOH (IOH)a N2(IIH)
RMINe VCC (Max)bVOL
IOLbN3(IIL)
Where:N1 (IOH)e total maximum output high currentforall
outputstiedto pull-up resistor (IIH)e total maximum input high currentforall
inputstiedto pull-up resistor (IIL)e total maximum inputlow currentforall
inputstiedto pull-up resistor
Connection Diagram
Dual-In-Line Package
TL/F/6363–1
Order Number 54LS38DMQB, 54LS38FMQB,54LS38LMQB,
DM54LS38J, DM74LS38MorDM74LS38N
See NSPackage Number E20A, J14A, M14A, N14A orW14B
Function TableeAB
Inputs Output Y H H H LeHigh Logic LeveleLow Logic Level
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
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